net/mlx: retrieve mbuf size through proper function

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx.h

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 4a857d8..dd3003c 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -107,12 +107,8 @@ struct rxq {
        struct rte_mempool *mp; /* Memory Pool for allocations. */
        struct ibv_cq *cq; /* Completion Queue. */
        struct ibv_exp_wq *wq; /* Work Queue. */
-       struct ibv_exp_wq_family *if_wq; /* WQ burst interface. */
-#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
-       struct ibv_exp_cq_family_v1 *if_cq; /* CQ interface. */
-#else /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
-       struct ibv_exp_cq_family *if_cq; /* CQ interface. */
-#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
+       int32_t (*poll)(); /* Verbs poll function. */
+       int32_t (*recv)(); /* Verbs receive function. */
        unsigned int port_id; /* Port ID for incoming packets. */
        unsigned int elts_n; /* (*elts)[] length. */
        unsigned int elts_head; /* Current index in (*elts)[]. */
@@ -120,16 +116,22 @@ struct rxq {
        unsigned int csum:1; /* Enable checksum offloading. */
        unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
        unsigned int vlan_strip:1; /* Enable VLAN stripping. */
+       unsigned int crc_present:1; /* CRC must be subtracted. */
        union {
                struct rxq_elt_sp (*sp)[]; /* Scattered RX elements. */
                struct rxq_elt (*no_sp)[]; /* RX elements. */
        } elts;
-       uint32_t mb_len; /* Length of a mp-issued mbuf. */
        unsigned int socket; /* CPU socket ID for allocations. */
        struct mlx5_rxq_stats stats; /* RX queue counters. */
        struct ibv_exp_res_domain *rd; /* Resource Domain. */
        struct fdir_queue fdir_queue; /* Flow director queue. */
        struct ibv_mr *mr; /* Memory Region (for mp). */
+       struct ibv_exp_wq_family *if_wq; /* WQ burst interface. */
+#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
+       struct ibv_exp_cq_family_v1 *if_cq; /* CQ interface. */
+#else /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
+       struct ibv_exp_cq_family *if_cq; /* CQ interface. */
+#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
 };
 
 /* Hash RX queue types. */
@@ -193,6 +195,7 @@ struct special_flow_init {
        uint8_t dst_mac_val[6];
        uint8_t dst_mac_mask[6];
        unsigned int hash_types;
+       unsigned int per_vlan:1;
 };
 
 enum hash_rxq_flow_type {
@@ -229,7 +232,8 @@ struct hash_rxq {
        enum hash_rxq_type type; /* Hash RX queue type. */
        /* MAC flow steering rules, one per VLAN ID. */
        struct ibv_exp_flow *mac_flow[MLX5_MAX_MAC_ADDRESSES][MLX5_MAX_VLAN_IDS];
-       struct ibv_exp_flow *special_flow[MLX5_MAX_SPECIAL_FLOWS];
+       struct ibv_exp_flow *special_flow
+               [MLX5_MAX_SPECIAL_FLOWS][MLX5_MAX_VLAN_IDS];
 };
 
 /* TX element. */
@@ -248,6 +252,24 @@ typedef uint8_t linear_t[16384];
 /* TX queue descriptor. */
 struct txq {
        struct priv *priv; /* Back pointer to private data. */
+       int32_t (*poll_cnt)(struct ibv_cq *cq, uint32_t max);
+       int (*send_pending)();
+#ifdef HAVE_VERBS_VLAN_INSERTION
+       int (*send_pending_vlan)();
+#endif
+#if MLX5_PMD_MAX_INLINE > 0
+       int (*send_pending_inline)();
+#ifdef HAVE_VERBS_VLAN_INSERTION
+       int (*send_pending_inline_vlan)();
+#endif
+#endif
+#if MLX5_PMD_SGE_WR_N > 1
+       int (*send_pending_sg_list)();
+#ifdef HAVE_VERBS_VLAN_INSERTION
+       int (*send_pending_sg_list_vlan)();
+#endif
+#endif
+       int (*send_flush)(struct ibv_qp *qp);
        struct ibv_cq *cq; /* Completion Queue. */
        struct ibv_qp *qp; /* Queue Pair. */
        struct txq_elt (*elts)[]; /* TX elements. */
@@ -269,7 +291,11 @@ struct txq {
        /* Elements used only for init part are here. */
        linear_t (*elts_linear)[]; /* Linearized buffers. */
        struct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */
+#ifdef HAVE_VERBS_VLAN_INSERTION
+       struct ibv_exp_qp_burst_family_v1 *if_qp; /* QP burst interface. */
+#else
        struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */
+#endif
        struct ibv_exp_cq_family *if_cq; /* CQ interface. */
        struct ibv_exp_res_domain *rd; /* Resource Domain. */
        unsigned int socket; /* CPU socket ID for allocations. */
@@ -296,17 +322,26 @@ int rxq_setup(struct rte_eth_dev *, struct rxq *, uint16_t, unsigned int,
 int mlx5_rx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,
                        const struct rte_eth_rxconf *, struct rte_mempool *);
 void mlx5_rx_queue_release(void *);
+uint16_t mlx5_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
+                             uint16_t pkts_n);
+
 
 /* mlx5_txq.c */
 
 void txq_cleanup(struct txq *);
+int txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
+         unsigned int socket, const struct rte_eth_txconf *conf);
+
 int mlx5_tx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,
                        const struct rte_eth_txconf *);
 void mlx5_tx_queue_release(void *);
+uint16_t mlx5_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
+                             uint16_t pkts_n);
 
 /* mlx5_rxtx.c */
 
-void txq_mp2mr_iter(const struct rte_mempool *, void *);
+struct ibv_mr *mlx5_mp2mr(struct ibv_pd *, struct rte_mempool *);
+void txq_mp2mr_iter(struct rte_mempool *, void *);
 uint16_t mlx5_tx_burst(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_rx_burst_sp(void *, struct rte_mbuf **, uint16_t);
 uint16_t mlx5_rx_burst(void *, struct rte_mbuf **, uint16_t);