net/dpaa: support FMCless mode

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx.h

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index c02a007..f3fe2e1 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -178,14 +178,14 @@ struct mlx5_rxq_obj {
        RTE_STD_C11
        union {
                struct {
-                       struct ibv_wq *wq; /* Work Queue. */
-                       struct ibv_cq *ibv_cq; /* Completion Queue. */
-                       struct ibv_comp_channel *ibv_channel;
+                       void *wq; /* Work Queue. */
+                       void *ibv_cq; /* Completion Queue. */
+                       void *ibv_channel;
                };
                struct {
                        struct mlx5_devx_obj *rq; /* DevX Rx Queue object. */
                        struct mlx5_devx_obj *devx_cq; /* DevX CQ object. */
-                       struct mlx5dv_devx_event_channel *devx_channel;
+                       void *devx_channel;
                };
        };
 };
@@ -212,8 +212,8 @@ struct mlx5_rxq_ctrl {
        uint32_t cq_dbr_umem_id;
        uint64_t cq_dbr_offset;
        /* Storing CQ door-bell information, needed when freeing door-bell. */
-       struct mlx5dv_devx_umem *wq_umem; /* WQ buffer registration info. */
-       struct mlx5dv_devx_umem *cq_umem; /* CQ buffer registration info. */
+       void *wq_umem; /* WQ buffer registration info. */
+       void *cq_umem; /* CQ buffer registration info. */
        struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration. */
 };
 
@@ -229,7 +229,7 @@ struct mlx5_ind_table_obj {
        enum mlx5_ind_tbl_type type;
        RTE_STD_C11
        union {
-               struct ibv_rwq_ind_table *ind_table; /**< Indirection table. */
+               void *ind_table; /**< Indirection table. */
                struct mlx5_devx_obj *rqt; /* DevX RQT object. */
        };
        uint32_t queues_n; /**< Number of queues in the list. */
@@ -243,7 +243,7 @@ struct mlx5_hrxq {
        struct mlx5_ind_table_obj *ind_table; /* Indirection table. */
        RTE_STD_C11
        union {
-               struct ibv_qp *qp; /* Verbs queue pair. */
+               void *qp; /* Verbs queue pair. */
                struct mlx5_devx_obj *tir; /* DevX TIR object. */
        };
 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
@@ -350,8 +350,8 @@ struct mlx5_txq_obj {
        RTE_STD_C11
        union {
                struct {
-                       struct ibv_cq *cq; /* Completion Queue. */
-                       struct ibv_qp *qp; /* Queue Pair. */
+                       void *cq; /* Completion Queue. */
+                       void *qp; /* Queue Pair. */
                };
                struct {
                        struct mlx5_devx_obj *sq;
@@ -361,12 +361,12 @@ struct mlx5_txq_obj {
                struct {
                        struct rte_eth_dev *dev;
                        struct mlx5_devx_obj *cq_devx;
-                       struct mlx5dv_devx_umem *cq_umem;
+                       void *cq_umem;
                        void *cq_buf;
                        int64_t cq_dbrec_offset;
                        struct mlx5_devx_dbr_page *cq_dbrec_page;
                        struct mlx5_devx_obj *sq_devx;
-                       struct mlx5dv_devx_umem *sq_umem;
+                       void *sq_umem;
                        void *sq_buf;
                        int64_t sq_dbrec_offset;
                        struct mlx5_devx_dbr_page *sq_dbrec_page;