net/octeontx2: add Tx queue rate limit

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx_vec_altivec.h

diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
index 8e8d59a..9778b0b 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
@@ -155,8 +155,9 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
                const vector unsigned long shmax = {64, 64};
 #endif
 
-               if (!(pos & 0x7) && pos + 8 < mcqe_n)
-                       rte_prefetch0((void *)(cq + pos + 8));
+               for (i = 0; i < MLX5_VPMD_DESCS_PER_LOOP; ++i)
+                       if (likely(pos + i < mcqe_n))
+                               rte_prefetch0((void *)(cq + pos + i));
 
                /* A.1 load mCQEs into a 128bit register. */
                mcqe1 = (vector unsigned char)vec_vsx_ld(0,
@@ -263,6 +264,19 @@ rxq_cq_decompress_v(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cq,
                        elts[pos + 2]->hash.fdir.hi = flow_tag;
                        elts[pos + 3]->hash.fdir.hi = flow_tag;
                }
+               if (rte_flow_dynf_metadata_avail()) {
+                       const uint32_t meta = *RTE_FLOW_DYNF_METADATA(t_pkt);
+
+                       /* Check if title packet has valid metadata. */
+                       if (meta) {
+                               MLX5_ASSERT(t_pkt->ol_flags &
+                                           PKT_RX_DYNF_METADATA);
+                               *RTE_FLOW_DYNF_METADATA(elts[pos]) = meta;
+                               *RTE_FLOW_DYNF_METADATA(elts[pos + 1]) = meta;
+                               *RTE_FLOW_DYNF_METADATA(elts[pos + 2]) = meta;
+                               *RTE_FLOW_DYNF_METADATA(elts[pos + 3]) = meta;
+                       }
+               }
 
                pos += MLX5_VPMD_DESCS_PER_LOOP;
                /* Move to next CQE and invalidate consumed CQEs. */