net/mlx5: fix indexed pools allocation on Windows

[dpdk.git] / drivers / net / mlx5 / mlx5_trigger.c

diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c
index ae7fcca..a9d5d58 100644 (file)
--- a/drivers/net/mlx5/mlx5_trigger.c
+++ b/drivers/net/mlx5/mlx5_trigger.c
@@ -697,7 +697,7 @@ mlx5_hairpin_bind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
        uint32_t explicit;
        uint16_t rx_queue;
 
-       if (mlx5_eth_find_next(rx_port, priv->pci_dev) != rx_port) {
+       if (mlx5_eth_find_next(rx_port, dev->device) != rx_port) {
                rte_errno = ENODEV;
                DRV_LOG(ERR, "Rx port %u does not belong to mlx5", rx_port);
                return -rte_errno;
@@ -835,7 +835,7 @@ mlx5_hairpin_unbind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
        int ret;
        uint16_t cur_port = priv->dev_data->port_id;
 
-       if (mlx5_eth_find_next(rx_port, priv->pci_dev) != rx_port) {
+       if (mlx5_eth_find_next(rx_port, dev->device) != rx_port) {
                rte_errno = ENODEV;
                DRV_LOG(ERR, "Rx port %u does not belong to mlx5", rx_port);
                return -rte_errno;
@@ -893,7 +893,6 @@ mlx5_hairpin_bind(struct rte_eth_dev *dev, uint16_t rx_port)
 {
        int ret = 0;
        uint16_t p, pp;
-       struct mlx5_priv *priv = dev->data->dev_private;
 
        /*
         * If the Rx port has no hairpin configuration with the current port,
@@ -902,7 +901,7 @@ mlx5_hairpin_bind(struct rte_eth_dev *dev, uint16_t rx_port)
         * information updating.
         */
        if (rx_port == RTE_MAX_ETHPORTS) {
-               MLX5_ETH_FOREACH_DEV(p, priv->pci_dev) {
+               MLX5_ETH_FOREACH_DEV(p, dev->device) {
                        ret = mlx5_hairpin_bind_single_port(dev, p);
                        if (ret != 0)
                                goto unbind;
@@ -912,7 +911,7 @@ mlx5_hairpin_bind(struct rte_eth_dev *dev, uint16_t rx_port)
                return mlx5_hairpin_bind_single_port(dev, rx_port);
        }
 unbind:
-       MLX5_ETH_FOREACH_DEV(pp, priv->pci_dev)
+       MLX5_ETH_FOREACH_DEV(pp, dev->device)
                if (pp < p)
                        mlx5_hairpin_unbind_single_port(dev, pp);
        return ret;
@@ -927,10 +926,9 @@ mlx5_hairpin_unbind(struct rte_eth_dev *dev, uint16_t rx_port)
 {
        int ret = 0;
        uint16_t p;
-       struct mlx5_priv *priv = dev->data->dev_private;
 
        if (rx_port == RTE_MAX_ETHPORTS)
-               MLX5_ETH_FOREACH_DEV(p, priv->pci_dev) {
+               MLX5_ETH_FOREACH_DEV(p, dev->device) {
                        ret = mlx5_hairpin_unbind_single_port(dev, p);
                        if (ret != 0)
                                return ret;
@@ -1187,7 +1185,7 @@ mlx5_dev_stop(struct rte_eth_dev *dev)
        /* Control flows for default traffic can be removed firstly. */
        mlx5_traffic_disable(dev);
        /* All RX queue flags will be cleared in the flush interface. */
-       mlx5_flow_list_flush(dev, &priv->flows, true);
+       mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, true);
        mlx5_flow_meter_rxq_flush(dev);
        mlx5_rx_intr_vec_disable(dev);
        priv->sh->port[priv->dev_port - 1].ih_port_id = RTE_MAX_ETHPORTS;
@@ -1261,7 +1259,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                }
                mlx5_txq_release(dev, i);
        }
-       if (priv->config.dv_esw_en && !priv->config.vf) {
+       if (priv->config.dv_esw_en && !priv->config.vf && !priv->config.sf) {
                if (mlx5_flow_create_esw_table_zero_flow(dev))
                        priv->fdb_def_rule = 1;
                else
@@ -1370,7 +1368,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
        return 0;
 error:
        ret = rte_errno; /* Save rte_errno before cleanup. */
-       mlx5_flow_list_flush(dev, &priv->ctrl_flows, false);
+       mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_CTL, false);
        rte_errno = ret; /* Restore rte_errno. */
        return -rte_errno;
 }
@@ -1385,9 +1383,7 @@ error:
 void
 mlx5_traffic_disable(struct rte_eth_dev *dev)
 {
-       struct mlx5_priv *priv = dev->data->dev_private;
-
-       mlx5_flow_list_flush(dev, &priv->ctrl_flows, false);
+       mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_CTL, false);
 }
 
 /**