common/cnxk: add lower bound check for SSO resources

[dpdk.git] / drivers / net / mlx5 / mlx5_trigger.c

diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c
index 11ae0d9..c68b32c 100644 (file)
--- a/drivers/net/mlx5/mlx5_trigger.c
+++ b/drivers/net/mlx5/mlx5_trigger.c
@@ -59,7 +59,7 @@ mlx5_txq_start(struct rte_eth_dev *dev)
 
                if (!txq_ctrl)
                        continue;
-               if (txq_ctrl->type == MLX5_TXQ_TYPE_STANDARD)
+               if (!txq_ctrl->is_hairpin)
                        txq_alloc_elts(txq_ctrl);
                MLX5_ASSERT(!txq_ctrl->obj);
                txq_ctrl->obj = mlx5_malloc(flags, sizeof(struct mlx5_txq_obj),
@@ -77,7 +77,7 @@ mlx5_txq_start(struct rte_eth_dev *dev)
                        txq_ctrl->obj = NULL;
                        goto error;
                }
-               if (txq_ctrl->type == MLX5_TXQ_TYPE_STANDARD) {
+               if (!txq_ctrl->is_hairpin) {
                        size_t size = txq_data->cqe_s * sizeof(*txq_data->fcqs);
 
                        txq_data->fcqs = mlx5_malloc(flags, size,
@@ -167,7 +167,7 @@ mlx5_rxq_ctrl_prepare(struct rte_eth_dev *dev, struct mlx5_rxq_ctrl *rxq_ctrl,
 {
        int ret = 0;
 
-       if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
+       if (!rxq_ctrl->is_hairpin) {
                /*
                 * Pre-register the mempools. Regardless of whether
                 * the implicit registration is enabled or not,
@@ -280,7 +280,7 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)
                txq_ctrl = mlx5_txq_get(dev, i);
                if (!txq_ctrl)
                        continue;
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN ||
+               if (!txq_ctrl->is_hairpin ||
                    txq_ctrl->hairpin_conf.peers[0].port != self_port) {
                        mlx5_txq_release(dev, i);
                        continue;
@@ -299,7 +299,7 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)
                if (!txq_ctrl)
                        continue;
                /* Skip hairpin queues with other peer ports. */
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN ||
+               if (!txq_ctrl->is_hairpin ||
                    txq_ctrl->hairpin_conf.peers[0].port != self_port) {
                        mlx5_txq_release(dev, i);
                        continue;
@@ -322,7 +322,7 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)
                        return -rte_errno;
                }
                rxq_ctrl = rxq->ctrl;
-               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN ||
+               if (!rxq_ctrl->is_hairpin ||
                    rxq->hairpin_conf.peers[0].queue != i) {
                        rte_errno = ENOMEM;
                        DRV_LOG(ERR, "port %u Tx queue %d can't be binded to "
@@ -412,7 +412,7 @@ mlx5_hairpin_queue_peer_update(struct rte_eth_dev *dev, uint16_t peer_queue,
                                dev->data->port_id, peer_queue);
                        return -rte_errno;
                }
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d is not a hairpin Txq",
                                dev->data->port_id, peer_queue);
@@ -444,7 +444,7 @@ mlx5_hairpin_queue_peer_update(struct rte_eth_dev *dev, uint16_t peer_queue,
                        return -rte_errno;
                }
                rxq_ctrl = rxq->ctrl;
-               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN) {
+               if (!rxq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d is not a hairpin Rxq",
                                dev->data->port_id, peer_queue);
@@ -510,7 +510,7 @@ mlx5_hairpin_queue_peer_bind(struct rte_eth_dev *dev, uint16_t cur_queue,
                                dev->data->port_id, cur_queue);
                        return -rte_errno;
                }
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d not a hairpin Txq",
                                dev->data->port_id, cur_queue);
@@ -570,7 +570,7 @@ mlx5_hairpin_queue_peer_bind(struct rte_eth_dev *dev, uint16_t cur_queue,
                        return -rte_errno;
                }
                rxq_ctrl = rxq->ctrl;
-               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN) {
+               if (!rxq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d not a hairpin Rxq",
                                dev->data->port_id, cur_queue);
@@ -644,7 +644,7 @@ mlx5_hairpin_queue_peer_unbind(struct rte_eth_dev *dev, uint16_t cur_queue,
                                dev->data->port_id, cur_queue);
                        return -rte_errno;
                }
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d not a hairpin Txq",
                                dev->data->port_id, cur_queue);
@@ -683,7 +683,7 @@ mlx5_hairpin_queue_peer_unbind(struct rte_eth_dev *dev, uint16_t cur_queue,
                        return -rte_errno;
                }
                rxq_ctrl = rxq->ctrl;
-               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN) {
+               if (!rxq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d not a hairpin Rxq",
                                dev->data->port_id, cur_queue);
@@ -751,7 +751,7 @@ mlx5_hairpin_bind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
                txq_ctrl = mlx5_txq_get(dev, i);
                if (txq_ctrl == NULL)
                        continue;
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        mlx5_txq_release(dev, i);
                        continue;
                }
@@ -791,7 +791,7 @@ mlx5_hairpin_bind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
                txq_ctrl = mlx5_txq_get(dev, i);
                if (txq_ctrl == NULL)
                        continue;
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        mlx5_txq_release(dev, i);
                        continue;
                }
@@ -886,7 +886,7 @@ mlx5_hairpin_unbind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
                txq_ctrl = mlx5_txq_get(dev, i);
                if (txq_ctrl == NULL)
                        continue;
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        mlx5_txq_release(dev, i);
                        continue;
                }
@@ -1016,7 +1016,7 @@ mlx5_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
                        txq_ctrl = mlx5_txq_get(dev, i);
                        if (!txq_ctrl)
                                continue;
-                       if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+                       if (!txq_ctrl->is_hairpin) {
                                mlx5_txq_release(dev, i);
                                continue;
                        }
@@ -1040,7 +1040,7 @@ mlx5_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
                        if (rxq == NULL)
                                continue;
                        rxq_ctrl = rxq->ctrl;
-                       if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN)
+                       if (!rxq_ctrl->is_hairpin)
                                continue;
                        pp = rxq->hairpin_conf.peers[0].port;
                        if (pp >= RTE_MAX_ETHPORTS) {
@@ -1104,8 +1104,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)
                        dev->data->port_id, strerror(rte_errno));
                goto error;
        }
-       if ((priv->sh->cdev->config.devx && priv->config.dv_flow_en &&
-            priv->sh->dev_cap.dest_tir) &&
+       if (mlx5_devx_obj_ops_en(priv->sh) &&
            priv->obj_ops.lb_dummy_queue_create) {
                ret = priv->obj_ops.lb_dummy_queue_create(dev);
                if (ret)
@@ -1208,11 +1207,18 @@ mlx5_dev_start(struct rte_eth_dev *dev)
                priv->sh->port[priv->dev_port - 1].ih_port_id =
                                        (uint32_t)dev->data->port_id;
        } else {
-               DRV_LOG(INFO, "port %u starts without LSC and RMV interrupts.",
+               DRV_LOG(INFO, "port %u starts without RMV interrupts.",
                        dev->data->port_id);
-               dev->data->dev_conf.intr_conf.lsc = 0;
                dev->data->dev_conf.intr_conf.rmv = 0;
        }
+       if (rte_intr_fd_get(priv->sh->intr_handle_nl) >= 0) {
+               priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
+                                       (uint32_t)dev->data->port_id;
+       } else {
+               DRV_LOG(INFO, "port %u starts without LSC interrupts.",
+                       dev->data->port_id);
+               dev->data->dev_conf.intr_conf.lsc = 0;
+       }
        if (rte_intr_fd_get(priv->sh->intr_handle_devx) >= 0)
                priv->sh->port[priv->dev_port - 1].devx_ih_port_id =
                                        (uint32_t)dev->data->port_id;
@@ -1264,6 +1270,7 @@ mlx5_dev_stop(struct rte_eth_dev *dev)
        mlx5_rx_intr_vec_disable(dev);
        priv->sh->port[priv->dev_port - 1].ih_port_id = RTE_MAX_ETHPORTS;
        priv->sh->port[priv->dev_port - 1].devx_ih_port_id = RTE_MAX_ETHPORTS;
+       priv->sh->port[priv->dev_port - 1].nl_ih_port_id = RTE_MAX_ETHPORTS;
        mlx5_txq_stop(dev);
        mlx5_rxq_stop(dev);
        if (priv->obj_ops.lb_dummy_queue_release)
@@ -1277,8 +1284,6 @@ mlx5_dev_stop(struct rte_eth_dev *dev)
  * Enable traffic flows configured by control plane
  *
  * @param dev
- *   Pointer to Ethernet device private data.
- * @param dev
  *   Pointer to Ethernet device structure.
  *
  * @return
@@ -1321,7 +1326,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                if (!txq_ctrl)
                        continue;
                /* Only Tx implicit mode requires the default Tx flow. */
-               if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN &&
+               if (txq_ctrl->is_hairpin &&
                    txq_ctrl->hairpin_conf.tx_explicit == 0 &&
                    txq_ctrl->hairpin_conf.peers[0].port ==
                    priv->dev_data->port_id) {
@@ -1331,7 +1336,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                                goto error;
                        }
                }
-               if (priv->config.dv_esw_en) {
+               if (priv->sh->config.dv_esw_en) {
                        if (mlx5_flow_create_devx_sq_miss_flow(dev, i) == 0) {
                                DRV_LOG(ERR,
                                        "Port %u Tx queue %u SQ create representor devx default miss rule failed.",
@@ -1341,7 +1346,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                }
                mlx5_txq_release(dev, i);
        }
-       if (priv->config.dv_esw_en) {
+       if (priv->sh->config.dv_esw_en) {
                if (mlx5_flow_create_esw_table_zero_flow(dev))
                        priv->fdb_def_rule = 1;
                else
@@ -1349,7 +1354,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                                " configured - only Eswitch group 0 flows are"
                                " supported.", dev->data->port_id);
        }
-       if (!priv->config.lacp_by_user && priv->pf_bond >= 0) {
+       if (!priv->sh->config.lacp_by_user && priv->pf_bond >= 0) {
                ret = mlx5_flow_lacp_miss(dev);
                if (ret)
                        DRV_LOG(INFO, "port %u LACP rule cannot be created - "