common/cnxk: add lower bound check for SSO resources

[dpdk.git] / drivers / net / mlx5 / mlx5_trigger.c

diff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c
index 68df3f8..c68b32c 100644 (file)
--- a/drivers/net/mlx5/mlx5_trigger.c
+++ b/drivers/net/mlx5/mlx5_trigger.c
@@ -59,7 +59,7 @@ mlx5_txq_start(struct rte_eth_dev *dev)
 
                if (!txq_ctrl)
                        continue;
-               if (txq_ctrl->type == MLX5_TXQ_TYPE_STANDARD)
+               if (!txq_ctrl->is_hairpin)
                        txq_alloc_elts(txq_ctrl);
                MLX5_ASSERT(!txq_ctrl->obj);
                txq_ctrl->obj = mlx5_malloc(flags, sizeof(struct mlx5_txq_obj),
@@ -77,7 +77,7 @@ mlx5_txq_start(struct rte_eth_dev *dev)
                        txq_ctrl->obj = NULL;
                        goto error;
                }
-               if (txq_ctrl->type == MLX5_TXQ_TYPE_STANDARD) {
+               if (!txq_ctrl->is_hairpin) {
                        size_t size = txq_data->cqe_s * sizeof(*txq_data->fcqs);
 
                        txq_data->fcqs = mlx5_malloc(flags, size,
@@ -167,7 +167,7 @@ mlx5_rxq_ctrl_prepare(struct rte_eth_dev *dev, struct mlx5_rxq_ctrl *rxq_ctrl,
 {
        int ret = 0;
 
-       if (rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD) {
+       if (!rxq_ctrl->is_hairpin) {
                /*
                 * Pre-register the mempools. Regardless of whether
                 * the implicit registration is enabled or not,
@@ -215,10 +215,10 @@ mlx5_rxq_start(struct rte_eth_dev *dev)
                /* Should not release Rx queues but return immediately. */
                return -rte_errno;
        }
-       DRV_LOG(DEBUG, "Port %u device_attr.max_qp_wr is %d.",
-               dev->data->port_id, priv->sh->device_attr.max_qp_wr);
-       DRV_LOG(DEBUG, "Port %u device_attr.max_sge is %d.",
-               dev->data->port_id, priv->sh->device_attr.max_sge);
+       DRV_LOG(DEBUG, "Port %u dev_cap.max_qp_wr is %d.",
+               dev->data->port_id, priv->sh->dev_cap.max_qp_wr);
+       DRV_LOG(DEBUG, "Port %u dev_cap.max_sge is %d.",
+               dev->data->port_id, priv->sh->dev_cap.max_sge);
        for (i = 0; i != priv->rxqs_n; ++i) {
                struct mlx5_rxq_priv *rxq = mlx5_rxq_ref(dev, i);
                struct mlx5_rxq_ctrl *rxq_ctrl;
@@ -280,7 +280,7 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)
                txq_ctrl = mlx5_txq_get(dev, i);
                if (!txq_ctrl)
                        continue;
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN ||
+               if (!txq_ctrl->is_hairpin ||
                    txq_ctrl->hairpin_conf.peers[0].port != self_port) {
                        mlx5_txq_release(dev, i);
                        continue;
@@ -299,7 +299,7 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)
                if (!txq_ctrl)
                        continue;
                /* Skip hairpin queues with other peer ports. */
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN ||
+               if (!txq_ctrl->is_hairpin ||
                    txq_ctrl->hairpin_conf.peers[0].port != self_port) {
                        mlx5_txq_release(dev, i);
                        continue;
@@ -322,7 +322,7 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)
                        return -rte_errno;
                }
                rxq_ctrl = rxq->ctrl;
-               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN ||
+               if (!rxq_ctrl->is_hairpin ||
                    rxq->hairpin_conf.peers[0].queue != i) {
                        rte_errno = ENOMEM;
                        DRV_LOG(ERR, "port %u Tx queue %d can't be binded to "
@@ -341,14 +341,16 @@ mlx5_hairpin_auto_bind(struct rte_eth_dev *dev)
                sq_attr.state = MLX5_SQC_STATE_RDY;
                sq_attr.sq_state = MLX5_SQC_STATE_RST;
                sq_attr.hairpin_peer_rq = rq->id;
-               sq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
+               sq_attr.hairpin_peer_vhca =
+                               priv->sh->cdev->config.hca_attr.vhca_id;
                ret = mlx5_devx_cmd_modify_sq(sq, &sq_attr);
                if (ret)
                        goto error;
                rq_attr.state = MLX5_SQC_STATE_RDY;
                rq_attr.rq_state = MLX5_SQC_STATE_RST;
                rq_attr.hairpin_peer_sq = sq->id;
-               rq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
+               rq_attr.hairpin_peer_vhca =
+                               priv->sh->cdev->config.hca_attr.vhca_id;
                ret = mlx5_devx_cmd_modify_rq(rq, &rq_attr);
                if (ret)
                        goto error;
@@ -410,7 +412,7 @@ mlx5_hairpin_queue_peer_update(struct rte_eth_dev *dev, uint16_t peer_queue,
                                dev->data->port_id, peer_queue);
                        return -rte_errno;
                }
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d is not a hairpin Txq",
                                dev->data->port_id, peer_queue);
@@ -425,7 +427,7 @@ mlx5_hairpin_queue_peer_update(struct rte_eth_dev *dev, uint16_t peer_queue,
                        return -rte_errno;
                }
                peer_info->qp_id = txq_ctrl->obj->sq->id;
-               peer_info->vhca_id = priv->config.hca_attr.vhca_id;
+               peer_info->vhca_id = priv->sh->cdev->config.hca_attr.vhca_id;
                /* 1-to-1 mapping, only the first one is used. */
                peer_info->peer_q = txq_ctrl->hairpin_conf.peers[0].queue;
                peer_info->tx_explicit = txq_ctrl->hairpin_conf.tx_explicit;
@@ -442,7 +444,7 @@ mlx5_hairpin_queue_peer_update(struct rte_eth_dev *dev, uint16_t peer_queue,
                        return -rte_errno;
                }
                rxq_ctrl = rxq->ctrl;
-               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN) {
+               if (!rxq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d is not a hairpin Rxq",
                                dev->data->port_id, peer_queue);
@@ -455,7 +457,7 @@ mlx5_hairpin_queue_peer_update(struct rte_eth_dev *dev, uint16_t peer_queue,
                        return -rte_errno;
                }
                peer_info->qp_id = rxq_ctrl->obj->rq->id;
-               peer_info->vhca_id = priv->config.hca_attr.vhca_id;
+               peer_info->vhca_id = priv->sh->cdev->config.hca_attr.vhca_id;
                peer_info->peer_q = rxq->hairpin_conf.peers[0].queue;
                peer_info->tx_explicit = rxq->hairpin_conf.tx_explicit;
                peer_info->manual_bind = rxq->hairpin_conf.manual_bind;
@@ -508,7 +510,7 @@ mlx5_hairpin_queue_peer_bind(struct rte_eth_dev *dev, uint16_t cur_queue,
                                dev->data->port_id, cur_queue);
                        return -rte_errno;
                }
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d not a hairpin Txq",
                                dev->data->port_id, cur_queue);
@@ -568,7 +570,7 @@ mlx5_hairpin_queue_peer_bind(struct rte_eth_dev *dev, uint16_t cur_queue,
                        return -rte_errno;
                }
                rxq_ctrl = rxq->ctrl;
-               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN) {
+               if (!rxq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d not a hairpin Rxq",
                                dev->data->port_id, cur_queue);
@@ -642,7 +644,7 @@ mlx5_hairpin_queue_peer_unbind(struct rte_eth_dev *dev, uint16_t cur_queue,
                                dev->data->port_id, cur_queue);
                        return -rte_errno;
                }
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d not a hairpin Txq",
                                dev->data->port_id, cur_queue);
@@ -681,7 +683,7 @@ mlx5_hairpin_queue_peer_unbind(struct rte_eth_dev *dev, uint16_t cur_queue,
                        return -rte_errno;
                }
                rxq_ctrl = rxq->ctrl;
-               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN) {
+               if (!rxq_ctrl->is_hairpin) {
                        rte_errno = EINVAL;
                        DRV_LOG(ERR, "port %u queue %d not a hairpin Rxq",
                                dev->data->port_id, cur_queue);
@@ -749,7 +751,7 @@ mlx5_hairpin_bind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
                txq_ctrl = mlx5_txq_get(dev, i);
                if (txq_ctrl == NULL)
                        continue;
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        mlx5_txq_release(dev, i);
                        continue;
                }
@@ -789,7 +791,7 @@ mlx5_hairpin_bind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
                txq_ctrl = mlx5_txq_get(dev, i);
                if (txq_ctrl == NULL)
                        continue;
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        mlx5_txq_release(dev, i);
                        continue;
                }
@@ -817,7 +819,7 @@ mlx5_hairpin_bind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
                /* Pass TxQ's information to peer RxQ and try binding. */
                cur.peer_q = rx_queue;
                cur.qp_id = txq_ctrl->obj->sq->id;
-               cur.vhca_id = priv->config.hca_attr.vhca_id;
+               cur.vhca_id = priv->sh->cdev->config.hca_attr.vhca_id;
                cur.tx_explicit = txq_ctrl->hairpin_conf.tx_explicit;
                cur.manual_bind = txq_ctrl->hairpin_conf.manual_bind;
                /*
@@ -853,7 +855,7 @@ error:
 
 /*
  * Unbind the hairpin port pair, HW configuration of both devices will be clear
- * and status will be reset for all the queues used between the them.
+ * and status will be reset for all the queues used between them.
  * This function only supports to unbind the Tx from one Rx.
  *
  * @param dev
@@ -884,7 +886,7 @@ mlx5_hairpin_unbind_single_port(struct rte_eth_dev *dev, uint16_t rx_port)
                txq_ctrl = mlx5_txq_get(dev, i);
                if (txq_ctrl == NULL)
                        continue;
-               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+               if (!txq_ctrl->is_hairpin) {
                        mlx5_txq_release(dev, i);
                        continue;
                }
@@ -1014,7 +1016,7 @@ mlx5_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
                        txq_ctrl = mlx5_txq_get(dev, i);
                        if (!txq_ctrl)
                                continue;
-                       if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+                       if (!txq_ctrl->is_hairpin) {
                                mlx5_txq_release(dev, i);
                                continue;
                        }
@@ -1038,7 +1040,7 @@ mlx5_hairpin_get_peer_ports(struct rte_eth_dev *dev, uint16_t *peer_ports,
                        if (rxq == NULL)
                                continue;
                        rxq_ctrl = rxq->ctrl;
-                       if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN)
+                       if (!rxq_ctrl->is_hairpin)
                                continue;
                        pp = rxq->hairpin_conf.peers[0].port;
                        if (pp >= RTE_MAX_ETHPORTS) {
@@ -1102,8 +1104,8 @@ mlx5_dev_start(struct rte_eth_dev *dev)
                        dev->data->port_id, strerror(rte_errno));
                goto error;
        }
-       if ((priv->sh->devx && priv->config.dv_flow_en &&
-           priv->config.dest_tir) && priv->obj_ops.lb_dummy_queue_create) {
+       if (mlx5_devx_obj_ops_en(priv->sh) &&
+           priv->obj_ops.lb_dummy_queue_create) {
                ret = priv->obj_ops.lb_dummy_queue_create(dev);
                if (ret)
                        goto error;
@@ -1115,7 +1117,7 @@ mlx5_dev_start(struct rte_eth_dev *dev)
                goto error;
        }
        if (priv->config.std_delay_drop || priv->config.hp_delay_drop) {
-               if (!priv->config.vf && !priv->config.sf &&
+               if (!priv->sh->dev_cap.vf && !priv->sh->dev_cap.sf &&
                    !priv->representor) {
                        ret = mlx5_get_flag_dropless_rq(dev);
                        if (ret < 0)
@@ -1205,11 +1207,18 @@ mlx5_dev_start(struct rte_eth_dev *dev)
                priv->sh->port[priv->dev_port - 1].ih_port_id =
                                        (uint32_t)dev->data->port_id;
        } else {
-               DRV_LOG(INFO, "port %u starts without LSC and RMV interrupts.",
+               DRV_LOG(INFO, "port %u starts without RMV interrupts.",
                        dev->data->port_id);
-               dev->data->dev_conf.intr_conf.lsc = 0;
                dev->data->dev_conf.intr_conf.rmv = 0;
        }
+       if (rte_intr_fd_get(priv->sh->intr_handle_nl) >= 0) {
+               priv->sh->port[priv->dev_port - 1].nl_ih_port_id =
+                                       (uint32_t)dev->data->port_id;
+       } else {
+               DRV_LOG(INFO, "port %u starts without LSC interrupts.",
+                       dev->data->port_id);
+               dev->data->dev_conf.intr_conf.lsc = 0;
+       }
        if (rte_intr_fd_get(priv->sh->intr_handle_devx) >= 0)
                priv->sh->port[priv->dev_port - 1].devx_ih_port_id =
                                        (uint32_t)dev->data->port_id;
@@ -1244,8 +1253,8 @@ mlx5_dev_stop(struct rte_eth_dev *dev)
 
        dev->data->dev_started = 0;
        /* Prevent crashes when queues are still in use. */
-       dev->rx_pkt_burst = removed_rx_burst;
-       dev->tx_pkt_burst = removed_tx_burst;
+       dev->rx_pkt_burst = rte_eth_pkt_burst_dummy;
+       dev->tx_pkt_burst = rte_eth_pkt_burst_dummy;
        rte_wmb();
        /* Disable datapath on secondary process. */
        mlx5_mp_os_req_stop_rxtx(dev);
@@ -1261,6 +1270,7 @@ mlx5_dev_stop(struct rte_eth_dev *dev)
        mlx5_rx_intr_vec_disable(dev);
        priv->sh->port[priv->dev_port - 1].ih_port_id = RTE_MAX_ETHPORTS;
        priv->sh->port[priv->dev_port - 1].devx_ih_port_id = RTE_MAX_ETHPORTS;
+       priv->sh->port[priv->dev_port - 1].nl_ih_port_id = RTE_MAX_ETHPORTS;
        mlx5_txq_stop(dev);
        mlx5_rxq_stop(dev);
        if (priv->obj_ops.lb_dummy_queue_release)
@@ -1274,8 +1284,6 @@ mlx5_dev_stop(struct rte_eth_dev *dev)
  * Enable traffic flows configured by control plane
  *
  * @param dev
- *   Pointer to Ethernet device private data.
- * @param dev
  *   Pointer to Ethernet device structure.
  *
  * @return
@@ -1318,7 +1326,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                if (!txq_ctrl)
                        continue;
                /* Only Tx implicit mode requires the default Tx flow. */
-               if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN &&
+               if (txq_ctrl->is_hairpin &&
                    txq_ctrl->hairpin_conf.tx_explicit == 0 &&
                    txq_ctrl->hairpin_conf.peers[0].port ==
                    priv->dev_data->port_id) {
@@ -1328,8 +1336,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                                goto error;
                        }
                }
-               if ((priv->representor || priv->master) &&
-                   priv->config.dv_esw_en) {
+               if (priv->sh->config.dv_esw_en) {
                        if (mlx5_flow_create_devx_sq_miss_flow(dev, i) == 0) {
                                DRV_LOG(ERR,
                                        "Port %u Tx queue %u SQ create representor devx default miss rule failed.",
@@ -1339,7 +1346,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                }
                mlx5_txq_release(dev, i);
        }
-       if ((priv->master || priv->representor) && priv->config.dv_esw_en) {
+       if (priv->sh->config.dv_esw_en) {
                if (mlx5_flow_create_esw_table_zero_flow(dev))
                        priv->fdb_def_rule = 1;
                else
@@ -1347,7 +1354,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                                " configured - only Eswitch group 0 flows are"
                                " supported.", dev->data->port_id);
        }
-       if (!priv->config.lacp_by_user && priv->pf_bond >= 0) {
+       if (!priv->sh->config.lacp_by_user && priv->pf_bond >= 0) {
                ret = mlx5_flow_lacp_miss(dev);
                if (ret)
                        DRV_LOG(INFO, "port %u LACP rule cannot be created - "