#include "mlx5.h"
#include "mlx5_autoconf.h"
-#include "mlx5_mr.h"
/* TX burst subroutines return codes. */
enum mlx5_txcmp_code {
int mlx5_tx_hairpin_queue_setup
(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
const struct rte_eth_hairpin_conf *hairpin_conf);
-void mlx5_tx_queue_release(void *dpdk_txq);
+void mlx5_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
void txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl);
int mlx5_tx_uar_init_secondary(struct rte_eth_dev *dev, int fd);
void mlx5_tx_uar_uninit_secondary(struct rte_eth_dev *dev);
int mlx5_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
struct rte_eth_burst_mode *mode);
-/* mlx5_mr.c */
-
-uint32_t mlx5_tx_mb2mr_bh(struct mlx5_txq_data *txq, struct rte_mbuf *mb);
-uint32_t mlx5_tx_update_ext_mp(struct mlx5_txq_data *txq, uintptr_t addr,
- struct rte_mempool *mp);
-
/* mlx5_tx_empw.c */
MLX5_TXOFF_PRE_DECL(full_empw);
#endif
/**
- * Query LKey from a packet buffer for Tx. If not found, add the mempool.
+ * Query LKey from a packet buffer for Tx.
*
* @param txq
* Pointer to Tx queue structure.
- * @param addr
- * Address to search.
+ * @param mb
+ * Pointer to mbuf.
*
* @return
* Searched LKey on success, UINT32_MAX on no match.
mlx5_tx_mb2mr(struct mlx5_txq_data *txq, struct rte_mbuf *mb)
{
struct mlx5_mr_ctrl *mr_ctrl = &txq->mr_ctrl;
- uintptr_t addr = (uintptr_t)mb->buf_addr;
- uint32_t lkey;
-
- /* Check generation bit to see if there's any change on existing MRs. */
- if (unlikely(*mr_ctrl->dev_gen_ptr != mr_ctrl->cur_gen))
- mlx5_mr_flush_local_cache(mr_ctrl);
- /* Linear search on MR cache array. */
- lkey = mlx5_mr_lookup_lkey(mr_ctrl->cache, &mr_ctrl->mru,
- MLX5_MR_CACHE_N, addr);
- if (likely(lkey != UINT32_MAX))
- return lkey;
+ struct mlx5_txq_ctrl *txq_ctrl =
+ container_of(txq, struct mlx5_txq_ctrl, txq);
+ struct mlx5_priv *priv = txq_ctrl->priv;
+
/* Take slower bottom-half on miss. */
- return mlx5_tx_mb2mr_bh(txq, mb);
+ return mlx5_mr_mb2mr(priv->sh->cdev, &priv->mp_id, mr_ctrl, mb);
}
/**
/* Fill metadata field if needed. */
es->metadata = MLX5_TXOFF_CONFIG(METADATA) ?
loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
- *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0;
+ rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) :
+ 0 : 0;
/* Engage VLAN tag insertion feature if requested. */
if (MLX5_TXOFF_CONFIG(VLAN) &&
loc->mbuf->ol_flags & PKT_TX_VLAN_PKT) {
/* Fill metadata field if needed. */
es->metadata = MLX5_TXOFF_CONFIG(METADATA) ?
loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
- *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0;
+ rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) :
+ 0 : 0;
psrc = rte_pktmbuf_mtod(loc->mbuf, uint8_t *);
es->inline_hdr_sz = RTE_BE16(MLX5_ESEG_MIN_INLINE_SIZE);
es->inline_data = *(unaligned_uint16_t *)psrc;
/* Fill metadata field if needed. */
es->metadata = MLX5_TXOFF_CONFIG(METADATA) ?
loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
- *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0;
+ rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) :
+ 0 : 0;
psrc = rte_pktmbuf_mtod(loc->mbuf, uint8_t *);
es->inline_hdr_sz = rte_cpu_to_be_16(inlen);
es->inline_data = *(unaligned_uint16_t *)psrc;
/* Fill metadata field if needed. */
es->metadata = MLX5_TXOFF_CONFIG(METADATA) ?
loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
- *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0 : 0;
+ rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) :
+ 0 : 0;
MLX5_ASSERT(inlen >= MLX5_ESEG_MIN_INLINE_SIZE);
pdst = (uint8_t *)&es->inline_data;
if (MLX5_TXOFF_CONFIG(VLAN) && vlan) {
* Copying may be interrupted inside the routine
* if run into no inline hint flag.
*/
- copy = tlen >= txq->inlen_mode ? 0 : (txq->inlen_mode - tlen);
+ copy = tso ? inlen : txq->inlen_mode;
+ copy = tlen >= copy ? 0 : (copy - tlen);
copy = mlx5_tx_mseg_memcpy(pdst, loc, part, copy, olx);
tlen += copy;
if (likely(inlen <= tlen) || copy < part) {
unsigned int nxlen;
uintptr_t start;
+ mbuf = loc->mbuf;
+ nxlen = rte_pktmbuf_data_len(mbuf);
/*
* Packet length exceeds the allowed inline data length,
* check whether the minimal inlining is required.
MLX5_ESEG_MIN_INLINE_SIZE);
MLX5_ASSERT(txq->inlen_mode <= txq->inlen_send);
inlen = txq->inlen_mode;
- } else {
- if (loc->mbuf->ol_flags & PKT_TX_DYNF_NOINLINE ||
- !vlan || txq->vlan_en) {
- /*
- * VLAN insertion will be done inside by HW.
- * It is not utmost effective - VLAN flag is
- * checked twice, but we should proceed the
- * inlining length correctly and take into
- * account the VLAN header being inserted.
- */
- return mlx5_tx_packet_multi_send
- (txq, loc, olx);
- }
+ } else if (vlan && !txq->vlan_en) {
+ /*
+ * VLAN insertion is requested and hardware does not
+ * support the offload, will do with software inline.
+ */
inlen = MLX5_ESEG_MIN_INLINE_SIZE;
+ } else if (mbuf->ol_flags & PKT_TX_DYNF_NOINLINE ||
+ nxlen > txq->inlen_send) {
+ return mlx5_tx_packet_multi_send(txq, loc, olx);
+ } else {
+ goto do_first;
}
/*
* Now we know the minimal amount of data is requested
* to inline. Check whether we should inline the buffers
* from the chain beginning to eliminate some mbufs.
*/
- mbuf = loc->mbuf;
- nxlen = rte_pktmbuf_data_len(mbuf);
if (unlikely(nxlen <= txq->inlen_send)) {
/* We can inline first mbuf at least. */
if (nxlen < inlen) {
goto do_align;
}
}
+do_first:
do {
inlen = nxlen;
mbuf = NEXT(mbuf);
/* Fill metadata field if needed. */
if (MLX5_TXOFF_CONFIG(METADATA) &&
es->metadata != (loc->mbuf->ol_flags & PKT_TX_DYNF_METADATA ?
- *RTE_FLOW_DYNF_METADATA(loc->mbuf) : 0))
+ rte_cpu_to_be_32(*RTE_FLOW_DYNF_METADATA(loc->mbuf)) : 0))
return false;
/* Legacy MPW can send packets with the same length only. */
if (MLX5_TXOFF_CONFIG(MPW) &&
git.droids-corp.org / dpdk.git / blobdiff