net/bnxt: fix FW version query

[dpdk.git] / drivers / net / mlx5 / mlx5_txq.c

diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index 2ad849a..29e5cab 100644 (file)
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -30,6 +30,7 @@
 #include <mlx5_glue.h>
 #include <mlx5_devx_cmds.h>
 #include <mlx5_common.h>
+#include <mlx5_common_mr.h>
 
 #include "mlx5_defs.h"
 #include "mlx5_utils.h"
@@ -512,9 +513,20 @@ mlx5_txq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)
        attr.tis_lst_sz = 1;
        max_wq_data = priv->config.hca_attr.log_max_hairpin_wq_data_sz;
        /* Jumbo frames > 9KB should be supported, and more packets. */
-       attr.wq_attr.log_hairpin_data_sz =
-                       (max_wq_data < MLX5_HAIRPIN_JUMBO_LOG_SIZE) ?
-                       max_wq_data : MLX5_HAIRPIN_JUMBO_LOG_SIZE;
+       if (priv->config.log_hp_size != (uint32_t)MLX5_ARG_UNSET) {
+               if (priv->config.log_hp_size > max_wq_data) {
+                       DRV_LOG(ERR, "total data size %u power of 2 is "
+                               "too large for hairpin",
+                               priv->config.log_hp_size);
+                       rte_errno = ERANGE;
+                       return NULL;
+               }
+               attr.wq_attr.log_hairpin_data_sz = priv->config.log_hp_size;
+       } else {
+               attr.wq_attr.log_hairpin_data_sz =
+                               (max_wq_data < MLX5_HAIRPIN_JUMBO_LOG_SIZE) ?
+                                max_wq_data : MLX5_HAIRPIN_JUMBO_LOG_SIZE;
+       }
        /* Set the packets number to the maximum value for performance. */
        attr.wq_attr.log_hairpin_num_packets =
                        attr.wq_attr.log_hairpin_data_sz -
@@ -983,7 +995,7 @@ txq_set_params(struct mlx5_txq_ctrl *txq_ctrl)
         * If there is requested minimal amount of data to inline
         * we MUST enable inlining. This is a case for ConnectX-4
         * which usually requires L2 inlined for correct operating
-        * and ConnectX-4LX which requires L2-L4 inlined to
+        * and ConnectX-4 Lx which requires L2-L4 inlined to
         * support E-Switch Flows.
         */
        if (inlen_mode) {
@@ -1278,7 +1290,7 @@ mlx5_txq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
                goto error;
        }
        /* Save pointer of global generation number to check memory event. */
-       tmpl->txq.mr_ctrl.dev_gen_ptr = &priv->sh->mr.dev_gen;
+       tmpl->txq.mr_ctrl.dev_gen_ptr = &priv->sh->share_cache.dev_gen;
        MLX5_ASSERT(desc > MLX5_TX_COMP_THRESH);
        tmpl->txq.offloads = conf->offloads |
                             dev->data->dev_conf.txmode.offloads;