* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_tx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc)
+mlx5_tx_queue_pre_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t *desc)
{
struct mlx5_priv *priv = dev->data->dev_private;
- if (desc <= MLX5_TX_COMP_THRESH) {
+ if (*desc <= MLX5_TX_COMP_THRESH) {
DRV_LOG(WARNING,
"port %u number of descriptors requested for Tx queue"
" %u must be higher than MLX5_TX_COMP_THRESH, using %u"
- " instead of %u",
- dev->data->port_id, idx, MLX5_TX_COMP_THRESH + 1, desc);
- desc = MLX5_TX_COMP_THRESH + 1;
+ " instead of %u", dev->data->port_id, idx,
+ MLX5_TX_COMP_THRESH + 1, *desc);
+ *desc = MLX5_TX_COMP_THRESH + 1;
}
- if (!rte_is_power_of_2(desc)) {
- desc = 1 << log2above(desc);
+ if (!rte_is_power_of_2(*desc)) {
+ *desc = 1 << log2above(*desc);
DRV_LOG(WARNING,
"port %u increased number of descriptors in Tx queue"
" %u to the next power of two (%d)",
- dev->data->port_id, idx, desc);
+ dev->data->port_id, idx, *desc);
}
DRV_LOG(DEBUG, "port %u configuring queue %u for %u descriptors",
- dev->data->port_id, idx, desc);
+ dev->data->port_id, idx, *desc);
if (idx >= priv->txqs_n) {
DRV_LOG(ERR, "port %u Tx queue index out of range (%u >= %u)",
dev->data->port_id, idx, priv->txqs_n);
container_of(txq, struct mlx5_txq_ctrl, txq);
int res;
- res = mlx5_tx_queue_pre_setup(dev, idx, desc);
+ res = mlx5_tx_queue_pre_setup(dev, idx, &desc);
if (res)
return res;
txq_ctrl = mlx5_txq_new(dev, idx, desc, socket, conf);
container_of(txq, struct mlx5_txq_ctrl, txq);
int res;
- res = mlx5_tx_queue_pre_setup(dev, idx, desc);
+ res = mlx5_tx_queue_pre_setup(dev, idx, &desc);
if (res)
return res;
if (hairpin_conf->peer_count != 1 ||
munmap(RTE_PTR_ALIGN_FLOOR(addr, page_size), page_size);
}
+/**
+ * Deinitialize Tx UAR registers for secondary process.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ */
+void
+mlx5_tx_uar_uninit_secondary(struct rte_eth_dev *dev)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_txq_data *txq;
+ struct mlx5_txq_ctrl *txq_ctrl;
+ unsigned int i;
+
+ MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_SECONDARY);
+ for (i = 0; i != priv->txqs_n; ++i) {
+ if (!(*priv->txqs)[i])
+ continue;
+ txq = (*priv->txqs)[i];
+ txq_ctrl = container_of(txq, struct mlx5_txq_ctrl, txq);
+ txq_uar_uninit_secondary(txq_ctrl);
+ }
+}
+
/**
* Initialize Tx UAR registers for secondary process.
*
container_of(txq_data, struct mlx5_txq_ctrl, txq);
struct mlx5_devx_create_sq_attr attr = { 0 };
struct mlx5_txq_obj *tmpl = NULL;
- int ret = 0;
uint32_t max_wq_data;
MLX5_ASSERT(txq_data);
"port %u Tx queue %u cannot allocate memory resources",
dev->data->port_id, txq_data->idx);
rte_errno = ENOMEM;
- goto error;
+ return NULL;
}
tmpl->type = MLX5_TXQ_OBJ_TYPE_DEVX_HAIRPIN;
tmpl->txq_ctrl = txq_ctrl;
DRV_LOG(ERR, "total data size %u power of 2 is "
"too large for hairpin",
priv->config.log_hp_size);
+ rte_free(tmpl);
rte_errno = ERANGE;
return NULL;
}
DRV_LOG(ERR,
"port %u tx hairpin queue %u can't create sq object",
dev->data->port_id, idx);
+ rte_free(tmpl);
rte_errno = errno;
- goto error;
+ return NULL;
}
DRV_LOG(DEBUG, "port %u sxq %u updated with %p", dev->data->port_id,
idx, (void *)&tmpl);
rte_atomic32_inc(&tmpl->refcnt);
LIST_INSERT_HEAD(&priv->txqsobj, tmpl, next);
return tmpl;
-error:
- ret = rte_errno; /* Save rte_errno before cleanup. */
- if (tmpl->tis)
- mlx5_devx_cmd_destroy(tmpl->tis);
- if (tmpl->sq)
- mlx5_devx_cmd_destroy(tmpl->sq);
- rte_errno = ret; /* Restore rte_errno. */
- return NULL;
}
/**
.cap = {
/* Max number of outstanding WRs. */
.max_send_wr =
- ((priv->sh->device_attr.orig_attr.max_qp_wr <
+ ((priv->sh->device_attr.max_qp_wr <
desc) ?
- priv->sh->device_attr.orig_attr.max_qp_wr :
+ priv->sh->device_attr.max_qp_wr :
desc),
/*
* Max number of scatter/gather elements in a WR,
/* Move the QP to this state. */
.qp_state = IBV_QPS_INIT,
/* IB device port number. */
- .port_num = (uint8_t)priv->ibv_port,
+ .port_num = (uint8_t)priv->dev_port,
};
ret = mlx5_glue->modify_qp(tmpl.qp, &attr.mod,
(IBV_QP_STATE | IBV_QP_PORT));
claim_zero(mlx5_glue->destroy_cq(tmpl.cq));
if (tmpl.qp)
claim_zero(mlx5_glue->destroy_qp(tmpl.qp));
- if (txq_data && txq_data->fcqs)
+ if (txq_data->fcqs)
rte_free(txq_data->fcqs);
if (txq_obj)
rte_free(txq_obj);
struct mlx5_priv *priv = txq_ctrl->priv;
unsigned int wqe_size;
- wqe_size = priv->sh->device_attr.orig_attr.max_qp_wr / desc;
+ wqe_size = priv->sh->device_attr.max_qp_wr / desc;
if (!wqe_size)
return 0;
/*
" Tx queue size (%d)",
txq_ctrl->txq.inlen_mode, max_inline,
priv->dev_data->port_id,
- priv->sh->device_attr.orig_attr.max_qp_wr);
+ priv->sh->device_attr.max_qp_wr);
goto error;
}
if (txq_ctrl->txq.inlen_send > max_inline &&
" Tx queue size (%d)",
txq_ctrl->txq.inlen_send, max_inline,
priv->dev_data->port_id,
- priv->sh->device_attr.orig_attr.max_qp_wr);
+ priv->sh->device_attr.max_qp_wr);
goto error;
}
if (txq_ctrl->txq.inlen_empw > max_inline &&
" Tx queue size (%d)",
txq_ctrl->txq.inlen_empw, max_inline,
priv->dev_data->port_id,
- priv->sh->device_attr.orig_attr.max_qp_wr);
+ priv->sh->device_attr.max_qp_wr);
goto error;
}
if (txq_ctrl->txq.tso_en && max_inline < MLX5_MAX_TSO_HEADER) {
" Tx queue size (%d)",
MLX5_MAX_TSO_HEADER, max_inline,
priv->dev_data->port_id,
- priv->sh->device_attr.orig_attr.max_qp_wr);
+ priv->sh->device_attr.max_qp_wr);
goto error;
}
if (txq_ctrl->txq.inlen_send > max_inline) {
if (txq_adjust_params(tmpl))
goto error;
if (txq_calc_wqebb_cnt(tmpl) >
- priv->sh->device_attr.orig_attr.max_qp_wr) {
+ priv->sh->device_attr.max_qp_wr) {
DRV_LOG(ERR,
"port %u Tx WQEBB count (%d) exceeds the limit (%d),"
" try smaller queue size",
dev->data->port_id, txq_calc_wqebb_cnt(tmpl),
- priv->sh->device_attr.orig_attr.max_qp_wr);
+ priv->sh->device_attr.max_qp_wr);
rte_errno = ENOMEM;
goto error;
}