net/mlx: prefix private structure

[dpdk.git] / drivers / net / mlx5 / mlx5_txq.c

diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index 5057561..d185617 100644 (file)
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -102,7 +102,7 @@ txq_free_elts(struct mlx5_txq_ctrl *txq_ctrl)
 uint64_t
 mlx5_get_tx_port_offloads(struct rte_eth_dev *dev)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        uint64_t offloads = (DEV_TX_OFFLOAD_MULTI_SEGS |
                             DEV_TX_OFFLOAD_VLAN_INSERT);
        struct mlx5_dev_config *config = &priv->config;
@@ -120,7 +120,6 @@ mlx5_get_tx_port_offloads(struct rte_eth_dev *dev)
                        offloads |= (DEV_TX_OFFLOAD_IP_TNL_TSO |
                                     DEV_TX_OFFLOAD_UDP_TNL_TSO);
        }
-
        if (config->tunnel_en) {
                if (config->hw_csum)
                        offloads |= DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
@@ -128,6 +127,10 @@ mlx5_get_tx_port_offloads(struct rte_eth_dev *dev)
                        offloads |= (DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
                                     DEV_TX_OFFLOAD_GRE_TNL_TSO);
        }
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+       if (config->dv_flow_en)
+               offloads |= DEV_TX_OFFLOAD_MATCH_METADATA;
+#endif
        return offloads;
 }
 
@@ -152,7 +155,7 @@ int
 mlx5_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
                    unsigned int socket, const struct rte_eth_txconf *conf)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        struct mlx5_txq_data *txq = (*priv->txqs)[idx];
        struct mlx5_txq_ctrl *txq_ctrl =
                container_of(txq, struct mlx5_txq_ctrl, txq);
@@ -210,7 +213,7 @@ mlx5_tx_queue_release(void *dpdk_txq)
 {
        struct mlx5_txq_data *txq = (struct mlx5_txq_data *)dpdk_txq;
        struct mlx5_txq_ctrl *txq_ctrl;
-       struct priv *priv;
+       struct mlx5_priv *priv;
        unsigned int i;
 
        if (txq == NULL)
@@ -243,7 +246,7 @@ mlx5_tx_queue_release(void *dpdk_txq)
 int
 mlx5_tx_uar_remap(struct rte_eth_dev *dev, int fd)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        unsigned int i, j;
        uintptr_t pages[priv->txqs_n];
        unsigned int pages_n = 0;
@@ -255,6 +258,9 @@ mlx5_tx_uar_remap(struct rte_eth_dev *dev, int fd)
        struct mlx5_txq_ctrl *txq_ctrl;
        int already_mapped;
        size_t page_size = sysconf(_SC_PAGESIZE);
+#ifndef RTE_ARCH_64
+       unsigned int lock_idx;
+#endif
 
        memset(pages, 0, priv->txqs_n * sizeof(uintptr_t));
        /*
@@ -281,7 +287,7 @@ mlx5_tx_uar_remap(struct rte_eth_dev *dev, int fd)
                }
                /* new address in reserved UAR address space. */
                addr = RTE_PTR_ADD(priv->uar_base,
-                                  uar_va & (MLX5_UAR_SIZE - 1));
+                                  uar_va & (uintptr_t)(MLX5_UAR_SIZE - 1));
                if (!already_mapped) {
                        pages[pages_n++] = uar_va;
                        /* fixed mmap to specified address in reserved
@@ -305,6 +311,12 @@ mlx5_tx_uar_remap(struct rte_eth_dev *dev, int fd)
                else
                        assert(txq_ctrl->txq.bf_reg ==
                               RTE_PTR_ADD((void *)addr, off));
+#ifndef RTE_ARCH_64
+               /* Assign a UAR lock according to UAR page number */
+               lock_idx = (txq_ctrl->uar_mmap_offset / page_size) &
+                          MLX5_UAR_PAGE_NUM_MASK;
+               txq->uar_lock = &priv->uar_lock[lock_idx];
+#endif
        }
        return 0;
 }
@@ -342,7 +354,7 @@ is_empw_burst_func(eth_tx_burst_t tx_pkt_burst)
 struct mlx5_txq_ibv *
 mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
        struct mlx5_txq_ctrl *txq_ctrl =
                container_of(txq_data, struct mlx5_txq_ctrl, txq);
@@ -511,6 +523,8 @@ mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
        rte_atomic32_inc(&txq_ibv->refcnt);
        if (qp.comp_mask & MLX5DV_QP_MASK_UAR_MMAP_OFFSET) {
                txq_ctrl->uar_mmap_offset = qp.uar_mmap_offset;
+               DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx",
+                       dev->data->port_id, txq_ctrl->uar_mmap_offset);
        } else {
                DRV_LOG(ERR,
                        "port %u failed to retrieve UAR info, invalid"
@@ -548,7 +562,7 @@ error:
 struct mlx5_txq_ibv *
 mlx5_txq_ibv_get(struct rte_eth_dev *dev, uint16_t idx)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        struct mlx5_txq_ctrl *txq_ctrl;
 
        if (idx >= priv->txqs_n)
@@ -609,7 +623,7 @@ mlx5_txq_ibv_releasable(struct mlx5_txq_ibv *txq_ibv)
 int
 mlx5_txq_ibv_verify(struct rte_eth_dev *dev)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        int ret = 0;
        struct mlx5_txq_ibv *txq_ibv;
 
@@ -630,7 +644,7 @@ mlx5_txq_ibv_verify(struct rte_eth_dev *dev)
 static void
 txq_set_params(struct mlx5_txq_ctrl *txq_ctrl)
 {
-       struct priv *priv = txq_ctrl->priv;
+       struct mlx5_priv *priv = txq_ctrl->priv;
        struct mlx5_dev_config *config = &priv->config;
        const unsigned int max_tso_inline =
                ((MLX5_MAX_TSO_HEADER + (RTE_CACHE_LINE_SIZE - 1)) /
@@ -740,7 +754,7 @@ struct mlx5_txq_ctrl *
 mlx5_txq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
             unsigned int socket, const struct rte_eth_txconf *conf)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        struct mlx5_txq_ctrl *tmpl;
 
        tmpl = rte_calloc_socket("TXQ", 1,
@@ -795,7 +809,7 @@ error:
 struct mlx5_txq_ctrl *
 mlx5_txq_get(struct rte_eth_dev *dev, uint16_t idx)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        struct mlx5_txq_ctrl *ctrl = NULL;
 
        if ((*priv->txqs)[idx]) {
@@ -821,7 +835,7 @@ mlx5_txq_get(struct rte_eth_dev *dev, uint16_t idx)
 int
 mlx5_txq_release(struct rte_eth_dev *dev, uint16_t idx)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        struct mlx5_txq_ctrl *txq;
        size_t page_size = sysconf(_SC_PAGESIZE);
 
@@ -858,7 +872,7 @@ mlx5_txq_release(struct rte_eth_dev *dev, uint16_t idx)
 int
 mlx5_txq_releasable(struct rte_eth_dev *dev, uint16_t idx)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        struct mlx5_txq_ctrl *txq;
 
        if (!(*priv->txqs)[idx])
@@ -879,7 +893,7 @@ mlx5_txq_releasable(struct rte_eth_dev *dev, uint16_t idx)
 int
 mlx5_txq_verify(struct rte_eth_dev *dev)
 {
-       struct priv *priv = dev->data->dev_private;
+       struct mlx5_priv *priv = dev->data->dev_private;
        struct mlx5_txq_ctrl *txq;
        int ret = 0;