net/mlx5: add header reformat HW steering action

[dpdk.git] / drivers / net / mlx5 / mlx5_txq.c

diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index edbaa50..f128c3d 100644 (file)
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -109,7 +109,8 @@ mlx5_get_tx_port_offloads(struct rte_eth_dev *dev)
                             RTE_ETH_TX_OFFLOAD_TCP_CKSUM);
        if (dev_cap->tso)
                offloads |= RTE_ETH_TX_OFFLOAD_TCP_TSO;
-       if (priv->sh->config.tx_pp)
+       if (priv->sh->config.tx_pp ||
+           priv->sh->cdev->config.hca_attr.wait_on_time)
                offloads |= RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP;
        if (dev_cap->swp) {
                if (dev_cap->swp & MLX5_SW_PARSING_CSUM_CAP)
@@ -1288,12 +1289,21 @@ mlx5_txq_dynf_timestamp_set(struct rte_eth_dev *dev)
        int off, nbit;
        unsigned int i;
        uint64_t mask = 0;
+       uint64_t ts_mask;
 
+       if (sh->dev_cap.rt_timestamp ||
+           !sh->cdev->config.hca_attr.dev_freq_khz)
+               ts_mask = MLX5_TS_MASK_SECS << 32;
+       else
+               ts_mask = rte_align64pow2(MLX5_TS_MASK_SECS * 1000ull *
+                               sh->cdev->config.hca_attr.dev_freq_khz);
+       ts_mask = rte_cpu_to_be_64(ts_mask - 1ull);
        nbit = rte_mbuf_dynflag_lookup
                                (RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME, NULL);
        off = rte_mbuf_dynfield_lookup
                                (RTE_MBUF_DYNFIELD_TIMESTAMP_NAME, NULL);
-       if (nbit >= 0 && off >= 0 && sh->txpp.refcnt)
+       if (nbit >= 0 && off >= 0 &&
+           (sh->txpp.refcnt || priv->sh->cdev->config.hca_attr.wait_on_time))
                mask = 1ULL << nbit;
        for (i = 0; i != priv->txqs_n; ++i) {
                data = (*priv->txqs)[i];
@@ -1302,5 +1312,9 @@ mlx5_txq_dynf_timestamp_set(struct rte_eth_dev *dev)
                data->sh = sh;
                data->ts_mask = mask;
                data->ts_offset = off;
+               data->rt_timestamp = sh->dev_cap.rt_timestamp;
+               data->rt_timemask = (data->offloads &
+                                    RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP) ?
+                                    ts_mask : 0;
        }
 }