#include <stdlib.h>
#include <rte_windows.h>
-#include <rte_ethdev_pci.h>
+#include <ethdev_pci.h>
#include <mlx5_glue.h>
#include <mlx5_devx_cmds.h>
#include "mlx5_common_os.h"
#include "mlx5_utils.h"
#include "mlx5_rxtx.h"
+#include "mlx5_rx.h"
+#include "mlx5_tx.h"
#include "mlx5_autoconf.h"
#include "mlx5_mr.h"
#include "mlx5_flow.h"
if (!sh->flow_tbls)
err = mlx5_alloc_table_hash_list(priv);
else
- DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
+ DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse",
(void *)sh->flow_tbls);
return err;
}
config->swp = 0;
config->ind_table_max_size =
sh->device_attr.max_rwq_indirection_table_size;
- if (RTE_CACHE_LINE_SIZE == 128 &&
- !(device_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
- cqe_comp = 0;
- else
- cqe_comp = 1;
+ cqe_comp = 0;
config->cqe_comp = cqe_comp;
DRV_LOG(DEBUG, "tunnel offloading is not supported");
config->tunnel_en = 0;
err = mlx5_dev_check_sibling_config(priv, config);
if (err)
goto error;
- config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
- IBV_DEVICE_RAW_IP_CSUM);
- DRV_LOG(DEBUG, "checksum offloading is %ssupported",
- (config->hw_csum ? "" : "not "));
DRV_LOG(DEBUG, "counters are not supported");
config->ind_table_max_size =
sh->device_attr.max_rwq_indirection_table_size;
config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
config->ind_table_max_size);
- config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
- IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
(config->hw_vlan_strip ? "" : "not "));
- config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
- IBV_RAW_PACKET_CAP_SCATTER_FCS);
if (config->hw_padding) {
DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
config->hw_padding = 0;
}
- config->tso = (sh->device_attr.max_tso > 0 &&
- (sh->device_attr.tso_supported_qpts &
- (1 << IBV_QPT_RAW_PACKET)));
if (config->tso)
config->tso_max_payload_sz = sh->device_attr.max_tso;
DRV_LOG(DEBUG, "%sMPS is %s.",
sh->cmng.relaxed_ordering_read =
config->hca_attr.relaxed_ordering_read;
}
+ config->hw_csum = config->hca_attr.csum_cap;
+ DRV_LOG(DEBUG, "checksum offloading is %ssupported",
+ (config->hw_csum ? "" : "not "));
}
if (config->devx) {
uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
(NS_PER_S / MS_PER_S))
config->rt_timestamp = 1;
}
+ sh->rq_ts_format = config->hca_attr.rq_ts_format;
+ sh->sq_ts_format = config->hca_attr.sq_ts_format;
+ sh->qp_ts_format = config->hca_attr.qp_ts_format;
}
if (config->mprq.enabled) {
DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");