app/eventdev: add ethernet device setup helpers

[dpdk.git] / drivers / net / mrvl / mrvl_ethdev.h

diff --git a/drivers/net/mrvl/mrvl_ethdev.h b/drivers/net/mrvl/mrvl_ethdev.h
index 626cfaa..f7afae5 100644 (file)
--- a/drivers/net/mrvl/mrvl_ethdev.h
+++ b/drivers/net/mrvl/mrvl_ethdev.h
@@ -1,7 +1,9 @@
 /*-
  *   BSD LICENSE
  *
- *   Copyright(c) 2017 Semihalf. All rights reserved.
+ *   Copyright(c) 2017 Marvell International Ltd.
+ *   Copyright(c) 2017 Semihalf.
+ *   All rights reserved.
  *
  *   Redistribution and use in source and binary forms, with or without
  *   modification, are permitted provided that the following conditions
@@ -13,7 +15,7 @@
  *       notice, this list of conditions and the following disclaimer in
  *       the documentation and/or other materials provided with the
  *       distribution.
- *     * Neither the name of Semihalf nor the names of its
+ *     * Neither the name of the copyright holder nor the names of its
  *       contributors may be used to endorse or promote products derived
  *       from this software without specific prior written permission.
  *
@@ -33,7 +35,13 @@
 #ifndef _MRVL_ETHDEV_H_
 #define _MRVL_ETHDEV_H_
 
+#include <rte_spinlock.h>
+
+#include <env/mv_autogen_comp_flags.h>
+#include <drivers/mv_pp2.h>
+#include <drivers/mv_pp2_bpool.h>
 #include <drivers/mv_pp2_cls.h>
+#include <drivers/mv_pp2_hif.h>
 #include <drivers/mv_pp2_ppio.h>
 
 /** Maximum number of rx queues per port */
@@ -69,10 +77,20 @@
 /** Packet offset inside RX buffer. */
 #define MRVL_PKT_OFFS 64
 
+/** Maximum number of descriptors in shadow queue. Must be power of 2 */
+#define MRVL_PP2_TX_SHADOWQ_SIZE MRVL_PP2_TXD_MAX
+
+/** Shadow queue size mask (since shadow queue size is power of 2) */
+#define MRVL_PP2_TX_SHADOWQ_MASK (MRVL_PP2_TX_SHADOWQ_SIZE - 1)
+
+/** Minimum number of sent buffers to release from shadow queue to BM */
+#define MRVL_PP2_BUF_RELEASE_BURST_SIZE        64
+
 struct mrvl_priv {
        /* Hot fields, used in fast path. */
        struct pp2_bpool *bpool;  /**< BPool pointer */
        struct pp2_ppio *ppio;    /**< Port handler pointer */
+       rte_spinlock_t lock;      /**< Spinlock for checking bpool status */
        uint16_t bpool_max_size;  /**< BPool maximum size */
        uint16_t bpool_min_size;  /**< BPool minimum size  */
        uint16_t bpool_init_size; /**< Configured BPool size  */
@@ -87,6 +105,9 @@ struct mrvl_priv {
        uint8_t pp_id;
        uint8_t ppio_id;
        uint8_t bpool_bit;
+       uint8_t rss_hf_tcp;
+       uint8_t uc_mc_flushed;
+       uint8_t vlan_flushed;
 
        struct pp2_ppio_params ppio_params;
        struct pp2_cls_qos_tbl_params qos_tbl_params;
@@ -94,7 +115,4 @@ struct mrvl_priv {
        uint16_t nb_rx_queues;
 };
 
-/** Number of ports configured. */
-extern int mrvl_ports_nb;
-
 #endif /* _MRVL_ETHDEV_H_ */