memset(&link, 0, sizeof(struct rte_eth_link));
if (nn_link_status & NFP_NET_CFG_STS_LINK)
- link.link_status = 1;
+ link.link_status = ETH_LINK_UP;
link.link_duplex = ETH_LINK_FULL_DUPLEX;
/* Other cards can limit the tx and rx rate per VF */
- link.link_speed = ETH_LINK_SPEED_40G;
+ link.link_speed = ETH_SPEED_NUM_40G;
if (old.link_status != link.link_status) {
nfp_net_dev_atomic_write_link_status(dev, &link);
dev_info->reta_size = NFP_NET_CFG_RSS_ITBL_SZ;
dev_info->hash_key_size = NFP_NET_CFG_RSS_KEY_SZ;
+
+ dev_info->speed_capa = ETH_LINK_SPEED_40G;
}
static const uint32_t *