crypto/dpaa_sec: support authonly and chain with raw API
[dpdk.git] / drivers / net / ngbe / base / ngbe_type.h
index 9741cb7..28540e4 100644 (file)
@@ -6,6 +6,8 @@
 #ifndef _NGBE_TYPE_H_
 #define _NGBE_TYPE_H_
 
+#define NGBE_LINK_UP_TIME      90 /* 9.0 Seconds */
+
 #define NGBE_FRAME_SIZE_DFT       (1522) /* Default frame size, +FCS */
 
 #define NGBE_ALIGN             128 /* as intel did */
@@ -63,6 +65,10 @@ enum ngbe_media_type {
 
 struct ngbe_hw;
 
+struct ngbe_addr_filter_info {
+       u32 mta_in_use;
+};
+
 /* Bus parameters */
 struct ngbe_bus_info {
        void (*set_lan_id)(struct ngbe_hw *hw);
@@ -88,29 +94,91 @@ struct ngbe_rom_info {
 struct ngbe_mac_info {
        s32 (*init_hw)(struct ngbe_hw *hw);
        s32 (*reset_hw)(struct ngbe_hw *hw);
+       s32 (*start_hw)(struct ngbe_hw *hw);
        s32 (*stop_hw)(struct ngbe_hw *hw);
+       s32 (*get_mac_addr)(struct ngbe_hw *hw, u8 *mac_addr);
+       s32 (*enable_rx_dma)(struct ngbe_hw *hw, u32 regval);
+       s32 (*disable_sec_rx_path)(struct ngbe_hw *hw);
+       s32 (*enable_sec_rx_path)(struct ngbe_hw *hw);
        s32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);
        void (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);
 
+       /* Link */
+       s32 (*setup_link)(struct ngbe_hw *hw, u32 speed,
+                              bool autoneg_wait_to_complete);
+       s32 (*check_link)(struct ngbe_hw *hw, u32 *speed,
+                              bool *link_up, bool link_up_wait_to_complete);
+       s32 (*get_link_capabilities)(struct ngbe_hw *hw,
+                                     u32 *speed, bool *autoneg);
+
+       /* RAR */
+       s32 (*set_rar)(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
+                         u32 enable_addr);
+       s32 (*clear_rar)(struct ngbe_hw *hw, u32 index);
+       s32 (*set_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);
+       s32 (*clear_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);
+       s32 (*init_rx_addrs)(struct ngbe_hw *hw);
+
        /* Manageability interface */
        s32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw);
+       s32 (*check_overtemp)(struct ngbe_hw *hw);
 
        enum ngbe_mac_type type;
+       u8 addr[ETH_ADDR_LEN];
+       u8 perm_addr[ETH_ADDR_LEN];
+       s32 mc_filter_type;
+       u32 mcft_size;
+       u32 num_rar_entries;
        u32 max_tx_queues;
        u32 max_rx_queues;
+       bool get_link_status;
        struct ngbe_thermal_sensor_data  thermal_sensor_data;
        bool set_lben;
+       u32  max_link_up_time;
+
+       u32 default_speeds;
+       bool autoneg;
 };
 
 struct ngbe_phy_info {
+       s32 (*identify)(struct ngbe_hw *hw);
+       s32 (*init_hw)(struct ngbe_hw *hw);
+       s32 (*reset_hw)(struct ngbe_hw *hw);
+       s32 (*read_reg)(struct ngbe_hw *hw, u32 reg_addr,
+                               u32 device_type, u16 *phy_data);
+       s32 (*write_reg)(struct ngbe_hw *hw, u32 reg_addr,
+                               u32 device_type, u16 phy_data);
+       s32 (*read_reg_unlocked)(struct ngbe_hw *hw, u32 reg_addr,
+                               u32 device_type, u16 *phy_data);
+       s32 (*write_reg_unlocked)(struct ngbe_hw *hw, u32 reg_addr,
+                               u32 device_type, u16 phy_data);
+       s32 (*setup_link)(struct ngbe_hw *hw, u32 speed,
+                               bool autoneg_wait_to_complete);
+       s32 (*check_link)(struct ngbe_hw *hw, u32 *speed, bool *link_up);
+
        enum ngbe_media_type media_type;
        enum ngbe_phy_type type;
+       u32 addr;
+       u32 id;
+       u32 revision;
+       u32 phy_semaphore_mask;
+       bool reset_disable;
+       u32 autoneg_advertised;
+};
+
+enum ngbe_isb_idx {
+       NGBE_ISB_HEADER,
+       NGBE_ISB_MISC,
+       NGBE_ISB_VEC0,
+       NGBE_ISB_VEC1,
+       NGBE_ISB_MAX
 };
 
 struct ngbe_hw {
        void IOMEM *hw_addr;
        void *back;
        struct ngbe_mac_info mac;
+       struct ngbe_addr_filter_info addr_ctrl;
        struct ngbe_phy_info phy;
        struct ngbe_rom_info rom;
        struct ngbe_bus_info bus;
@@ -122,7 +190,11 @@ struct ngbe_hw {
 
        uint64_t isb_dma;
        void IOMEM *isb_mem;
+       u16 nb_rx_queues;
+       u16 nb_tx_queues;
 
+       u32 q_rx_regs[8 * 4];
+       u32 q_tx_regs[8 * 4];
        bool is_pf;
 };