net/octeontx2: add context debug utils

[dpdk.git] / drivers / net / octeontx2 / otx2_ethdev.h

diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
index f7d8838..7c0bef2 100644 (file)
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -33,9 +33,53 @@
 /* Used for struct otx2_eth_dev::flags */
 #define OTX2_LINK_CFG_IN_PROGRESS_F    BIT_ULL(0)
 
+/* VLAN tag inserted by NIX_TX_VTAG_ACTION.
+ * In Tx space is always reserved for this in FRS.
+ */
+#define NIX_MAX_VTAG_INS               2
+#define NIX_MAX_VTAG_ACT_SIZE          (4 * NIX_MAX_VTAG_INS)
+
+/* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */
+#define NIX_L2_OVERHEAD \
+       (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + 8)
+
+/* HW config of frame size doesn't include FCS */
+#define NIX_MAX_HW_FRS                 9212
+#define NIX_MIN_HW_FRS                 60
+
+/* Since HW FRS includes NPC VTAG insertion space, user has reduced FRS */
+#define NIX_MAX_FRS    \
+       (NIX_MAX_HW_FRS + RTE_ETHER_CRC_LEN - NIX_MAX_VTAG_ACT_SIZE)
+
+#define NIX_MIN_FRS    \
+       (NIX_MIN_HW_FRS + RTE_ETHER_CRC_LEN)
+
+#define NIX_MAX_MTU    \
+       (NIX_MAX_FRS - NIX_L2_OVERHEAD)
+
 #define NIX_MAX_SQB                    512
 #define NIX_MIN_SQB                    32
+/* Group 0 will be used for RSS, 1 -7 will be used for rte_flow RSS action*/
+#define NIX_RSS_GRPS                   8
+#define NIX_HASH_KEY_SIZE              48 /* 352 Bits */
 #define NIX_RSS_RETA_SIZE              64
+#define        NIX_RX_MIN_DESC                 16
+#define NIX_RX_MIN_DESC_ALIGN          16
+#define NIX_RX_NB_SEG_MAX              6
+#define NIX_CQ_ENTRY_SZ                        128
+
+/* If PTP is enabled additional SEND MEM DESC is required which
+ * takes 2 words, hence max 7 iova address are possible
+ */
+#if defined(RTE_LIBRTE_IEEE1588)
+#define NIX_TX_NB_SEG_MAX              7
+#else
+#define NIX_TX_NB_SEG_MAX              9
+#endif
+
+#define NIX_RSS_OFFLOAD                (ETH_RSS_PORT | ETH_RSS_IP | ETH_RSS_UDP |\
+                                ETH_RSS_TCP | ETH_RSS_SCTP | \
+                                ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD)
 
 #define NIX_TX_OFFLOAD_CAPA ( \
        DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
@@ -62,11 +106,18 @@
        DEV_RX_OFFLOAD_QINQ_STRIP | \
        DEV_RX_OFFLOAD_TIMESTAMP)
 
+struct otx2_qint {
+       struct rte_eth_dev *eth_dev;
+       uint8_t qintx;
+};
+
 struct otx2_rss_info {
        uint16_t rss_size;
+       uint8_t rss_grps;
 };
 
 struct otx2_npc_flow_info {
+       uint16_t channel; /*rx channel */
        uint16_t flow_prealloc_size;
        uint16_t flow_max_priority;
 };
@@ -83,7 +134,14 @@ struct otx2_eth_dev {
        uint8_t lso_tsov6_idx;
        uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
        uint8_t max_mac_entries;
+       uint8_t lf_tx_stats;
+       uint8_t lf_rx_stats;
+       uint16_t cints;
+       uint16_t qints;
        uint8_t configured;
+       uint8_t configured_qints;
+       uint8_t configured_nb_rx_qs;
+       uint8_t configured_nb_tx_qs;
        uint16_t nix_msixoff;
        uintptr_t base;
        uintptr_t lmt_addr;
@@ -95,6 +153,7 @@ struct otx2_eth_dev {
        uint64_t tx_offloads;
        uint64_t rx_offload_capa;
        uint64_t tx_offload_capa;
+       struct otx2_qint qints_mem[RTE_MAX_QUEUES_PER_PORT];
        struct otx2_rss_info rss_info;
        struct otx2_npc_flow_info npc_flow;
 } __rte_cache_aligned;
@@ -105,9 +164,19 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
        return eth_dev->data->dev_private;
 }
 
+/* Ops */
+void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
+                      struct rte_eth_dev_info *dev_info);
+
 /* IRQ */
 int otx2_nix_register_irqs(struct rte_eth_dev *eth_dev);
+int oxt2_nix_register_queue_irqs(struct rte_eth_dev *eth_dev);
 void otx2_nix_unregister_irqs(struct rte_eth_dev *eth_dev);
+void oxt2_nix_unregister_queue_irqs(struct rte_eth_dev *eth_dev);
+
+/* Debug */
+int otx2_nix_queues_ctx_dump(struct rte_eth_dev *eth_dev);
+void otx2_nix_cqe_dump(const struct nix_cqe_hdr_s *cq);
 
 /* CGX */
 int otx2_cgx_rxtx_start(struct otx2_eth_dev *dev);