*(uint16_t *)extra_args = OTX2_PRIV_FLAGS_EDSA;
if (strcmp(value, "chlen90b") == 0)
- *(uint16_t *)extra_args = OTX2_PRIV_FLAGS_LEN_90B;
+ *(uint16_t *)extra_args = OTX2_PRIV_FLAGS_CH_LEN_90B;
+
+ if (strcmp(value, "chlen24b") == 0)
+ *(uint16_t *)extra_args = OTX2_PRIV_FLAGS_CH_LEN_24B;
+
+ if (strcmp(value, "exdsa") == 0)
+ *(uint16_t *)extra_args = OTX2_PRIV_FLAGS_EXDSA;
+
+ if (strcmp(value, "vlan_exdsa") == 0)
+ *(uint16_t *)extra_args = OTX2_PRIV_FLAGS_VLAN_EXDSA;
+
return 0;
}
return -EINVAL;
}
-RTE_PMD_REGISTER_PARAM_STRING(net_octeontx2,
+RTE_PMD_REGISTER_PARAM_STRING(OCTEONTX2_PMD,
OTX2_RSS_RETA_SIZE "=<64|128|256>"
OTX2_IPSEC_IN_MAX_SPI "=<1-65535>"
OTX2_SCL_ENABLE "=1"
OTX2_MAX_SQB_COUNT "=<8-512>"
OTX2_FLOW_PREALLOC_SIZE "=<1-32>"
OTX2_FLOW_MAX_PRIORITY "=<1-32>"
- OTX2_SWITCH_HEADER_TYPE "=<higig2|dsa|chlen90b>"
+ OTX2_SWITCH_HEADER_TYPE "=<higig2|dsa|chlen90b|chlen24b>"
OTX2_RSS_TAG_AS_XOR "=1"
OTX2_NPA_LOCK_MASK "=<1-65535>"
OTX2_LOCK_RX_CTX "=1"