net/octeontx2: support 96xx A1 silicon revision

[dpdk.git] / drivers / net / octeontx2 / otx2_ethdev_ops.c

diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 6a30483..8d0a3dc 100644 (file)
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -6,6 +6,92 @@
 
 #include "otx2_ethdev.h"
 
+int
+otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
+{
+       uint32_t buffsz, frame_size = mtu + NIX_L2_OVERHEAD;
+       struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+       struct rte_eth_dev_data *data = eth_dev->data;
+       struct otx2_mbox *mbox = dev->mbox;
+       struct nix_frs_cfg *req;
+       int rc;
+
+       /* Check if MTU is within the allowed range */
+       if (frame_size < NIX_MIN_FRS || frame_size > NIX_MAX_FRS)
+               return -EINVAL;
+
+       buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
+
+       /* Refuse MTU that requires the support of scattered packets
+        * when this feature has not been enabled before.
+        */
+       if (data->dev_started && frame_size > buffsz &&
+           !(dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER))
+               return -EINVAL;
+
+       /* Check <seg size> * <max_seg>  >= max_frame */
+       if ((dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER) &&
+           (frame_size > buffsz * NIX_RX_NB_SEG_MAX))
+               return -EINVAL;
+
+       req = otx2_mbox_alloc_msg_nix_set_hw_frs(mbox);
+       req->update_smq = true;
+       /* FRS HW config should exclude FCS but include NPC VTAG insert size */
+       req->maxlen = frame_size - RTE_ETHER_CRC_LEN + NIX_MAX_VTAG_ACT_SIZE;
+
+       rc = otx2_mbox_process(mbox);
+       if (rc)
+               return rc;
+
+       /* Now just update Rx MAXLEN */
+       req = otx2_mbox_alloc_msg_nix_set_hw_frs(mbox);
+       req->maxlen = frame_size - RTE_ETHER_CRC_LEN;
+
+       rc = otx2_mbox_process(mbox);
+       if (rc)
+               return rc;
+
+       if (frame_size > RTE_ETHER_MAX_LEN)
+               dev->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
+       else
+               dev->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
+
+       /* Update max_rx_pkt_len */
+       data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
+
+       return rc;
+}
+
+int
+otx2_nix_recalc_mtu(struct rte_eth_dev *eth_dev)
+{
+       struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+       struct rte_eth_dev_data *data = eth_dev->data;
+       struct rte_pktmbuf_pool_private *mbp_priv;
+       struct otx2_eth_rxq *rxq;
+       uint32_t buffsz;
+       uint16_t mtu;
+       int rc;
+
+       /* Get rx buffer size */
+       rxq = data->rx_queues[0];
+       mbp_priv = rte_mempool_get_priv(rxq->pool);
+       buffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;
+
+       /* Setup scatter mode if needed by jumbo */
+       if (data->dev_conf.rxmode.max_rx_pkt_len > buffsz)
+               dev->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
+
+       /* Setup MTU based on max_rx_pkt_len */
+       mtu = data->dev_conf.rxmode.max_rx_pkt_len - NIX_L2_OVERHEAD;
+
+       rc = otx2_nix_mtu_set(eth_dev, mtu);
+       if (rc)
+               otx2_err("Failed to set default MTU size %d", rc);
+
+       return rc;
+}
+
 static void
 nix_cgx_promisc_config(struct rte_eth_dev *eth_dev, int en)
 {
@@ -345,6 +431,10 @@ otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)
                .offloads = 0,
        };
 
+       devinfo->default_rxportconf = (struct rte_eth_dev_portconf) {
+               .ring_size = NIX_RX_DEFAULT_RING_SZ,
+       };
+
        devinfo->rx_desc_lim = (struct rte_eth_desc_lim) {
                .nb_max = UINT16_MAX,
                .nb_min = NIX_RX_MIN_DESC,