net/ice: support low Rx latency

[dpdk.git] / drivers / net / octeontx2 / otx2_ptp.c

diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index f34b933..91e5c0f 100644 (file)
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -2,7 +2,7 @@
  * Copyright(C) 2019 Marvell International Ltd.
  */
 
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
 
 #include "otx2_ethdev.h"
 
@@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
                return -EINVAL;
        }
 
+       if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+               otx2_err("Both PTP and switch header enabled");
+               return -EINVAL;
+       }
+
        /* Allocating a iova address for tx tstamp */
        const struct rte_memzone *ts;
        ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
@@ -234,6 +239,14 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
        dev->tstamp.tx_tstamp_iova = ts->iova;
        dev->tstamp.tx_tstamp = ts->addr;
 
+       rc = rte_mbuf_dyn_rx_timestamp_register(
+                       &dev->tstamp.tstamp_dynfield_offset,
+                       &dev->tstamp.rx_tstamp_dynflag);
+       if (rc != 0) {
+               otx2_err("Failed to register Rx timestamp field/flag");
+               return -rte_errno;
+       }
+
        /* System time should be already on by default */
        nix_start_timecounters(eth_dev);