int8_t gem_id;
};
static struct pfe *g_pfe;
+/* Supported Rx offloads */
+static uint64_t dev_rx_offloads_sup =
+ DEV_RX_OFFLOAD_IPV4_CKSUM |
+ DEV_RX_OFFLOAD_UDP_CKSUM |
+ DEV_RX_OFFLOAD_TCP_CKSUM;
+
+/* Supported Tx offloads */
+static uint64_t dev_tx_offloads_sup =
+ DEV_TX_OFFLOAD_IPV4_CKSUM |
+ DEV_TX_OFFLOAD_UDP_CKSUM |
+ DEV_TX_OFFLOAD_TCP_CKSUM;
/* TODO: make pfe_svr a runtime option.
* Driver should be able to get the SVR
* information from HW.
*/
unsigned int pfe_svr = SVR_LS1012A_REV1;
+static void *cbus_emac_base[3];
+static void *cbus_gpi_base[3];
int pfe_logtype_pmd;
+/* pfe_gemac_init
+ */
+static int
+pfe_gemac_init(struct pfe_eth_priv_s *priv)
+{
+ struct gemac_cfg cfg;
+
+ cfg.speed = SPEED_1000M;
+ cfg.duplex = DUPLEX_FULL;
+
+ gemac_set_config(priv->EMAC_baseaddr, &cfg);
+ gemac_allow_broadcast(priv->EMAC_baseaddr);
+ gemac_enable_1536_rx(priv->EMAC_baseaddr);
+ gemac_enable_stacked_vlan(priv->EMAC_baseaddr);
+ gemac_enable_pause_rx(priv->EMAC_baseaddr);
+ gemac_set_bus_width(priv->EMAC_baseaddr, 64);
+ gemac_enable_rx_checksum_offload(priv->EMAC_baseaddr);
+
+ return 0;
+}
+
static void
pfe_soc_version_get(void)
{
fclose(svr_file);
}
+static int pfe_eth_start(struct pfe_eth_priv_s *priv)
+{
+ gpi_enable(priv->GPI_baseaddr);
+ gemac_enable(priv->EMAC_baseaddr);
+
+ return 0;
+}
+
+static void
+pfe_eth_flush_txQ(struct pfe_eth_priv_s *priv, int tx_q_num, int
+ __rte_unused from_tx, __rte_unused int n_desc)
+{
+ struct rte_mbuf *mbuf;
+ unsigned int flags;
+
+ /* Clean HIF and client queue */
+ while ((mbuf = hif_lib_tx_get_next_complete(&priv->client,
+ tx_q_num, &flags,
+ HIF_TX_DESC_NT))) {
+ if (mbuf) {
+ mbuf->next = NULL;
+ mbuf->nb_segs = 1;
+ rte_pktmbuf_free(mbuf);
+ }
+ }
+}
+
+
+static void
+pfe_eth_flush_tx(struct pfe_eth_priv_s *priv)
+{
+ unsigned int ii;
+
+ for (ii = 0; ii < emac_txq_cnt; ii++)
+ pfe_eth_flush_txQ(priv, ii, 0, 0);
+}
+
+static int
+pfe_eth_event_handler(void *data, int event, __rte_unused int qno)
+{
+ struct pfe_eth_priv_s *priv = data;
+
+ switch (event) {
+ case EVENT_TXDONE_IND:
+ pfe_eth_flush_tx(priv);
+ hif_lib_event_handler_start(&priv->client, EVENT_TXDONE_IND, 0);
+ break;
+ case EVENT_HIGH_RX_WM:
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int
+pfe_eth_open(struct rte_eth_dev *dev)
+{
+ struct pfe_eth_priv_s *priv = dev->data->dev_private;
+ struct hif_client_s *client;
+ struct hif_shm *hif_shm;
+ int rc;
+
+ /* Register client driver with HIF */
+ client = &priv->client;
+
+ if (client->pfe) {
+ hif_shm = client->pfe->hif.shm;
+ /* TODO please remove the below code of if block, once we add
+ * the proper cleanup in eth_close
+ */
+ if (!test_bit(PFE_CL_GEM0 + priv->id,
+ &hif_shm->g_client_status[0])) {
+ /* Register client driver with HIF */
+ memset(client, 0, sizeof(*client));
+ client->id = PFE_CL_GEM0 + priv->id;
+ client->tx_qn = emac_txq_cnt;
+ client->rx_qn = EMAC_RXQ_CNT;
+ client->priv = priv;
+ client->pfe = priv->pfe;
+ client->port_id = dev->data->port_id;
+ client->event_handler = pfe_eth_event_handler;
+
+ client->tx_qsize = EMAC_TXQ_DEPTH;
+ client->rx_qsize = EMAC_RXQ_DEPTH;
+
+ rc = hif_lib_client_register(client);
+ if (rc) {
+ PFE_PMD_ERR("hif_lib_client_register(%d)"
+ " failed", client->id);
+ goto err0;
+ }
+ }
+ } else {
+ /* Register client driver with HIF */
+ memset(client, 0, sizeof(*client));
+ client->id = PFE_CL_GEM0 + priv->id;
+ client->tx_qn = emac_txq_cnt;
+ client->rx_qn = EMAC_RXQ_CNT;
+ client->priv = priv;
+ client->pfe = priv->pfe;
+ client->port_id = dev->data->port_id;
+ client->event_handler = pfe_eth_event_handler;
+
+ client->tx_qsize = EMAC_TXQ_DEPTH;
+ client->rx_qsize = EMAC_RXQ_DEPTH;
+
+ rc = hif_lib_client_register(client);
+ if (rc) {
+ PFE_PMD_ERR("hif_lib_client_register(%d) failed",
+ client->id);
+ goto err0;
+ }
+ }
+ rc = pfe_eth_start(priv);
+
+err0:
+ return rc;
+}
+
static int
pfe_eth_open_cdev(struct pfe_eth_priv_s *priv)
{
}
}
+static void
+pfe_eth_stop(struct rte_eth_dev *dev/*, int wake*/)
+{
+ struct pfe_eth_priv_s *priv = dev->data->dev_private;
+
+ gemac_disable(priv->EMAC_baseaddr);
+ gpi_disable(priv->GPI_baseaddr);
+}
+
static void
pfe_eth_exit(struct rte_eth_dev *dev, struct pfe *pfe)
{
PMD_INIT_FUNC_TRACE();
+ pfe_eth_stop(dev);
/* Close the device file for link status */
pfe_eth_close_cdev(dev->data->dev_private);
pfe->nb_devs--;
}
+static void
+pfe_eth_close(struct rte_eth_dev *dev)
+{
+ if (!dev)
+ return;
+
+ if (!g_pfe)
+ return;
+
+ pfe_eth_exit(dev, g_pfe);
+
+ if (g_pfe->nb_devs == 0) {
+ pfe_hif_exit(g_pfe);
+ pfe_hif_lib_exit(g_pfe);
+ rte_free(g_pfe);
+ g_pfe = NULL;
+ }
+}
+
+static int
+pfe_eth_configure(struct rte_eth_dev *dev __rte_unused)
+{
+ return 0;
+}
+
+static int
+pfe_eth_info(struct rte_eth_dev *dev,
+ struct rte_eth_dev_info *dev_info)
+{
+ struct pfe_eth_priv_s *internals = dev->data->dev_private;
+
+ dev_info->if_index = internals->id;
+ dev_info->max_mac_addrs = PFE_MAX_MACS;
+ dev_info->max_rx_queues = dev->data->nb_rx_queues;
+ dev_info->max_tx_queues = dev->data->nb_tx_queues;
+ dev_info->min_rx_bufsize = HIF_RX_PKT_MIN_SIZE;
+ dev_info->rx_offload_capa = dev_rx_offloads_sup;
+ dev_info->tx_offload_capa = dev_tx_offloads_sup;
+ if (pfe_svr == SVR_LS1012A_REV1)
+ dev_info->max_rx_pktlen = MAX_MTU_ON_REV1 + PFE_ETH_OVERHEAD;
+ else
+ dev_info->max_rx_pktlen = JUMBO_FRAME_SIZE;
+
+ return 0;
+}
+
+/* Only first mb_pool given on first call of this API will be used
+ * in whole system, also nb_rx_desc and rx_conf are unused params
+ */
+static int
+pfe_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
+ __rte_unused uint16_t nb_rx_desc,
+ __rte_unused unsigned int socket_id,
+ __rte_unused const struct rte_eth_rxconf *rx_conf,
+ struct rte_mempool *mb_pool)
+{
+ int rc = 0;
+ struct pfe *pfe;
+ struct pfe_eth_priv_s *priv = dev->data->dev_private;
+
+ pfe = priv->pfe;
+
+ if (queue_idx >= EMAC_RXQ_CNT) {
+ PFE_PMD_ERR("Invalid queue idx = %d, Max queues = %d",
+ queue_idx, EMAC_RXQ_CNT);
+ return -1;
+ }
+
+ if (!pfe->hif.setuped) {
+ rc = pfe_hif_shm_init(pfe->hif.shm, mb_pool);
+ if (rc) {
+ PFE_PMD_ERR("Could not allocate buffer descriptors");
+ return -1;
+ }
+
+ pfe->hif.shm->pool = mb_pool;
+ if (pfe_hif_init_buffers(&pfe->hif)) {
+ PFE_PMD_ERR("Could not initialize buffer descriptors");
+ return -1;
+ }
+ hif_init();
+ hif_rx_enable();
+ hif_tx_enable();
+ pfe->hif.setuped = 1;
+ }
+ dev->data->rx_queues[queue_idx] = &priv->client.rx_q[queue_idx];
+ priv->client.rx_q[queue_idx].queue_id = queue_idx;
+
+ return 0;
+}
+
+static void
+pfe_rx_queue_release(void *q __rte_unused)
+{
+ PMD_INIT_FUNC_TRACE();
+}
+
+static void
+pfe_tx_queue_release(void *q __rte_unused)
+{
+ PMD_INIT_FUNC_TRACE();
+}
+
+static int
+pfe_tx_queue_setup(struct rte_eth_dev *dev,
+ uint16_t queue_idx,
+ __rte_unused uint16_t nb_desc,
+ __rte_unused unsigned int socket_id,
+ __rte_unused const struct rte_eth_txconf *tx_conf)
+{
+ struct pfe_eth_priv_s *priv = dev->data->dev_private;
+
+ if (queue_idx >= emac_txq_cnt) {
+ PFE_PMD_ERR("Invalid queue idx = %d, Max queues = %d",
+ queue_idx, emac_txq_cnt);
+ return -1;
+ }
+ dev->data->tx_queues[queue_idx] = &priv->client.tx_q[queue_idx];
+ priv->client.tx_q[queue_idx].queue_id = queue_idx;
+ return 0;
+}
+
+static const struct eth_dev_ops ops = {
+ .dev_start = pfe_eth_open,
+ .dev_stop = pfe_eth_stop,
+ .dev_close = pfe_eth_close,
+ .dev_configure = pfe_eth_configure,
+ .dev_infos_get = pfe_eth_info,
+ .rx_queue_setup = pfe_rx_queue_setup,
+ .rx_queue_release = pfe_rx_queue_release,
+ .tx_queue_setup = pfe_tx_queue_setup,
+ .tx_queue_release = pfe_tx_queue_release,
+};
+
static int
pfe_eth_init(struct rte_vdev_device *vdev, struct pfe *pfe, int id)
{
struct rte_eth_dev *eth_dev = NULL;
struct pfe_eth_priv_s *priv = NULL;
+ struct ls1012a_eth_platform_data *einfo;
+ struct ls1012a_pfe_platform_data *pfe_info;
int err;
eth_dev = rte_eth_vdev_allocate(vdev, sizeof(*priv));
if (eth_dev == NULL)
return -ENOMEM;
+ /* Extract pltform data */
+ pfe_info = (struct ls1012a_pfe_platform_data *)&pfe->platform_data;
+ if (!pfe_info) {
+ PFE_PMD_ERR("pfe missing additional platform data");
+ err = -ENODEV;
+ goto err0;
+ }
+
+ einfo = (struct ls1012a_eth_platform_data *)pfe_info->ls1012a_eth_pdata;
+
+ /* einfo never be NULL, but no harm in having this check */
+ if (!einfo) {
+ PFE_PMD_ERR("pfe missing additional gemacs platform data");
+ err = -ENODEV;
+ goto err0;
+ }
+
priv = eth_dev->data->dev_private;
priv->ndev = eth_dev;
+ priv->id = einfo[id].gem_id;
priv->pfe = pfe;
pfe->eth.eth_priv[id] = priv;
+ /* Set the info in the priv to the current info */
+ priv->einfo = &einfo[id];
+ priv->EMAC_baseaddr = cbus_emac_base[id];
+ priv->PHY_baseaddr = cbus_emac_base[id];
+ priv->GPI_baseaddr = cbus_gpi_base[id];
+
#define HIF_GEMAC_TMUQ_BASE 6
priv->low_tmu_q = HIF_GEMAC_TMUQ_BASE + (id * 2);
priv->high_tmu_q = priv->low_tmu_q + 1;
}
eth_dev->data->mtu = 1500;
+ eth_dev->dev_ops = &ops;
+ pfe_eth_stop(eth_dev);
+ pfe_gemac_init(priv);
eth_dev->data->nb_rx_queues = 1;
eth_dev->data->nb_tx_queues = 1;
return err;
}
+static int
+pfe_get_gemac_if_proprties(struct pfe *pfe,
+ __rte_unused const struct device_node *parent,
+ unsigned int port, unsigned int if_cnt,
+ struct ls1012a_pfe_platform_data *pdata)
+{
+ const struct device_node *gem = NULL;
+ size_t size;
+ unsigned int ii = 0, phy_id = 0;
+ const u32 *addr;
+ const void *mac_addr;
+
+ for (ii = 0; ii < if_cnt; ii++) {
+ gem = of_get_next_child(parent, gem);
+ if (!gem)
+ goto err;
+ addr = of_get_property(gem, "reg", &size);
+ if (addr && (rte_be_to_cpu_32((unsigned int)*addr) == port))
+ break;
+ }
+
+ if (ii >= if_cnt) {
+ PFE_PMD_ERR("Failed to find interface = %d", if_cnt);
+ goto err;
+ }
+
+ pdata->ls1012a_eth_pdata[port].gem_id = port;
+
+ mac_addr = of_get_mac_address(gem);
+
+ if (mac_addr) {
+ memcpy(pdata->ls1012a_eth_pdata[port].mac_addr, mac_addr,
+ ETH_ALEN);
+ }
+
+ addr = of_get_property(gem, "fsl,mdio-mux-val", &size);
+ if (!addr) {
+ PFE_PMD_ERR("Invalid mdio-mux-val....");
+ } else {
+ phy_id = rte_be_to_cpu_32((unsigned int)*addr);
+ pdata->ls1012a_eth_pdata[port].mdio_muxval = phy_id;
+ }
+ if (pdata->ls1012a_eth_pdata[port].phy_id < 32)
+ pfe->mdio_muxval[pdata->ls1012a_eth_pdata[port].phy_id] =
+ pdata->ls1012a_eth_pdata[port].mdio_muxval;
+
+ return 0;
+
+err:
+ return -1;
+}
+
/* Parse integer from integer argument */
static int
parse_integer_arg(const char *key __rte_unused,
const uint32_t *addr;
uint64_t cbus_addr, ddr_size, cbus_size;
int rc = -1, fd = -1, gem_id;
- unsigned int interface_count = 0;
+ unsigned int ii, interface_count = 0;
size_t size = 0;
struct pfe_vdev_init_params init_params = {
.gem_id = -1
goto err;
}
+ g_pfe->ddr_baseaddr = pfe_mem_ptov(g_pfe->ddr_phys_baseaddr);
g_pfe->ddr_size = ddr_size;
g_pfe->cbus_size = cbus_size;
PFE_PMD_INFO("num interfaces = %d ", interface_count);
g_pfe->max_intf = interface_count;
+ g_pfe->platform_data.ls1012a_mdio_pdata[0].phy_mask = 0xffffffff;
+
+ for (ii = 0; ii < interface_count; ii++) {
+ pfe_get_gemac_if_proprties(g_pfe, np, ii, interface_count,
+ &g_pfe->platform_data);
+ }
+
+ pfe_lib_init(g_pfe->cbus_baseaddr, g_pfe->ddr_baseaddr,
+ g_pfe->ddr_phys_baseaddr, g_pfe->ddr_size);
+
+ PFE_PMD_INFO("CLASS version: %x", readl(CLASS_VERSION));
+ PFE_PMD_INFO("TMU version: %x", readl(TMU_VERSION));
+
+ PFE_PMD_INFO("BMU1 version: %x", readl(BMU1_BASE_ADDR + BMU_VERSION));
+ PFE_PMD_INFO("BMU2 version: %x", readl(BMU2_BASE_ADDR + BMU_VERSION));
+
+ PFE_PMD_INFO("EGPI1 version: %x", readl(EGPI1_BASE_ADDR + GPI_VERSION));
+ PFE_PMD_INFO("EGPI2 version: %x", readl(EGPI2_BASE_ADDR + GPI_VERSION));
+ PFE_PMD_INFO("HGPI version: %x", readl(HGPI_BASE_ADDR + GPI_VERSION));
+
+ PFE_PMD_INFO("HIF version: %x", readl(HIF_VERSION));
+ PFE_PMD_INFO("HIF NOPCY version: %x", readl(HIF_NOCPY_VERSION));
+
+ cbus_emac_base[0] = EMAC1_BASE_ADDR;
+ cbus_emac_base[1] = EMAC2_BASE_ADDR;
+
+ cbus_gpi_base[0] = EGPI1_BASE_ADDR;
+ cbus_gpi_base[1] = EGPI2_BASE_ADDR;
+
+ rc = pfe_hif_lib_init(g_pfe);
+ if (rc < 0)
+ goto err_hif_lib;
+
+ rc = pfe_hif_init(g_pfe);
+ if (rc < 0)
+ goto err_hif;
pfe_soc_version_get();
eth_init:
if (init_params.gem_id < 0)
return 0;
err_eth:
+ pfe_hif_exit(g_pfe);
+
+err_hif:
+ pfe_hif_lib_exit(g_pfe);
+
+err_hif_lib:
err_prop:
munmap(g_pfe->cbus_baseaddr, cbus_size);
err:
pfe_eth_exit(eth_dev, g_pfe);
munmap(g_pfe->cbus_baseaddr, g_pfe->cbus_size);
+ if (g_pfe->nb_devs == 0) {
+ pfe_hif_exit(g_pfe);
+ pfe_hif_lib_exit(g_pfe);
+ rte_free(g_pfe);
+ g_pfe = NULL;
+ }
return 0;
}
git.droids-corp.org / dpdk.git / blobdiff