memzone: rename address from physical to IOVA

[dpdk.git] / drivers / net / qede / base / bcm_osal.c

diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index d53dfee..fe42f32 100644 (file)
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -6,8 +6,6 @@
  * See LICENSE.qede_pmd for copyright and licensing details.
  */
 
-#include <zlib.h>
-
 #include <rte_memzone.h>
 #include <rte_errno.h>
 
@@ -18,6 +16,10 @@
 #include "ecore_mcp_api.h"
 #include "ecore_l2_api.h"
 
+/* Array of memzone pointers */
+static const struct rte_memzone *ecore_mz_mapping[RTE_MAX_MEMZONE];
+/* Counter to track current memzone allocated */
+uint16_t ecore_mz_count;
 
 unsigned long qede_log2_align(unsigned long n)
 {
@@ -100,9 +102,7 @@ inline u32 qede_find_first_zero_bit(unsigned long *addr, u32 limit)
        u32 nwords = 0;
        OSAL_BUILD_BUG_ON(!limit);
        nwords = (limit - 1) / OSAL_BITS_PER_UL + 1;
-       for (i = 0; i < nwords; i++)
-               if (~(addr[i] != 0))
-                       break;
+       for (i = 0; i < nwords && ~(addr[i]) == 0; i++);
        return (i == nwords) ? limit : i * OSAL_BITS_PER_UL + qede_ffz(addr[i]);
 }
 
@@ -122,6 +122,13 @@ void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
        uint32_t core_id = rte_lcore_id();
        unsigned int socket_id;
 
+       if (ecore_mz_count >= RTE_MAX_MEMZONE) {
+               DP_ERR(p_dev, "Memzone allocation count exceeds %u\n",
+                      RTE_MAX_MEMZONE);
+               *phys = 0;
+               return OSAL_NULL;
+       }
+
        OSAL_MEM_ZERO(mz_name, sizeof(*mz_name));
        snprintf(mz_name, sizeof(mz_name) - 1, "%lx",
                                        (unsigned long)rte_get_timer_cycles());
@@ -137,10 +144,12 @@ void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
                *phys = 0;
                return OSAL_NULL;
        }
-       *phys = mz->phys_addr;
-       DP_VERBOSE(p_dev, ECORE_MSG_PROBE,
-                  "size=%zu phys=0x%" PRIx64 " virt=%p on socket=%u\n",
-                  mz->len, mz->phys_addr, mz->addr, socket_id);
+       *phys = mz->iova;
+       ecore_mz_mapping[ecore_mz_count++] = mz;
+       DP_VERBOSE(p_dev, ECORE_MSG_SP,
+                  "Allocated dma memory size=%zu phys=0x%lx"
+                  " virt=%p core=%d\n",
+                  mz->len, (unsigned long)mz->iova, mz->addr, core_id);
        return mz->addr;
 }
 
@@ -152,6 +161,13 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *p_dev,
        uint32_t core_id = rte_lcore_id();
        unsigned int socket_id;
 
+       if (ecore_mz_count >= RTE_MAX_MEMZONE) {
+               DP_ERR(p_dev, "Memzone allocation count exceeds %u\n",
+                      RTE_MAX_MEMZONE);
+               *phys = 0;
+               return OSAL_NULL;
+       }
+
        OSAL_MEM_ZERO(mz_name, sizeof(*mz_name));
        snprintf(mz_name, sizeof(mz_name) - 1, "%lx",
                                        (unsigned long)rte_get_timer_cycles());
@@ -166,13 +182,31 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *p_dev,
                *phys = 0;
                return OSAL_NULL;
        }
-       *phys = mz->phys_addr;
-       DP_VERBOSE(p_dev, ECORE_MSG_PROBE,
-                  "aligned memory size=%zu phys=0x%" PRIx64 " virt=%p core=%d\n",
-                  mz->len, mz->phys_addr, mz->addr, core_id);
+       *phys = mz->iova;
+       ecore_mz_mapping[ecore_mz_count++] = mz;
+       DP_VERBOSE(p_dev, ECORE_MSG_SP,
+                  "Allocated aligned dma memory size=%zu phys=0x%lx"
+                  " virt=%p core=%d\n",
+                  mz->len, (unsigned long)mz->iova, mz->addr, core_id);
        return mz->addr;
 }
 
+void osal_dma_free_mem(struct ecore_dev *p_dev, dma_addr_t phys)
+{
+       uint16_t j;
+
+       for (j = 0 ; j < ecore_mz_count; j++) {
+               if (phys == ecore_mz_mapping[j]->iova) {
+                       DP_VERBOSE(p_dev, ECORE_MSG_SP,
+                               "Free memzone %s\n", ecore_mz_mapping[j]->name);
+                       rte_memzone_free(ecore_mz_mapping[j]);
+                       return;
+               }
+       }
+
+       DP_ERR(p_dev, "Unexpected memory free request\n");
+}
+
 #ifdef CONFIG_ECORE_ZIPPED_FW
 u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
                    u8 *input_buf, u32 max_size, u8 *unzip_buf)
@@ -215,11 +249,58 @@ qede_get_mcp_proto_stats(struct ecore_dev *edev,
 
        if (type == ECORE_MCP_LAN_STATS) {
                ecore_get_vport_stats(edev, &lan_stats);
-               stats->lan_stats.ucast_rx_pkts = lan_stats.rx_ucast_pkts;
-               stats->lan_stats.ucast_tx_pkts = lan_stats.tx_ucast_pkts;
+
+               /* @DPDK */
+               stats->lan_stats.ucast_rx_pkts = lan_stats.common.rx_ucast_pkts;
+               stats->lan_stats.ucast_tx_pkts = lan_stats.common.tx_ucast_pkts;
+
                stats->lan_stats.fcs_err = -1;
        } else {
                DP_INFO(edev, "Statistics request type %d not supported\n",
                       type);
        }
 }
+
+void
+qede_hw_err_notify(struct ecore_hwfn *p_hwfn, enum ecore_hw_err_type err_type)
+{
+       char err_str[64];
+
+       switch (err_type) {
+       case ECORE_HW_ERR_FAN_FAIL:
+               strcpy(err_str, "Fan Failure");
+               break;
+       case ECORE_HW_ERR_MFW_RESP_FAIL:
+               strcpy(err_str, "MFW Response Failure");
+               break;
+       case ECORE_HW_ERR_HW_ATTN:
+               strcpy(err_str, "HW Attention");
+               break;
+       case ECORE_HW_ERR_DMAE_FAIL:
+               strcpy(err_str, "DMAE Failure");
+               break;
+       case ECORE_HW_ERR_RAMROD_FAIL:
+               strcpy(err_str, "Ramrod Failure");
+               break;
+       case ECORE_HW_ERR_FW_ASSERT:
+               strcpy(err_str, "FW Assertion");
+               break;
+       default:
+               strcpy(err_str, "Unknown");
+       }
+
+       DP_ERR(p_hwfn, "HW error occurred [%s]\n", err_str);
+       ecore_int_attn_clr_enable(p_hwfn->p_dev, true);
+}
+
+u32 qede_crc32(u32 crc, u8 *ptr, u32 length)
+{
+       int i;
+
+       while (length--) {
+               crc ^= *ptr++;
+               for (i = 0; i < 8; i++)
+                       crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
+       }
+       return crc;
+}