enum _ecore_status_t ecore_resc_alloc(struct ecore_dev *p_dev)
{
enum _ecore_status_t rc = ECORE_SUCCESS;
+ enum dbg_status debug_status = DBG_STATUS_OK;
int i;
if (IS_VF(p_dev)) {
goto alloc_err;
}
- rc = OSAL_DBG_ALLOC_USER_DATA(p_hwfn, &p_hwfn->dbg_user_info);
- if (rc) {
+ debug_status = OSAL_DBG_ALLOC_USER_DATA(p_hwfn,
+ &p_hwfn->dbg_user_info);
+ if (debug_status) {
DP_NOTICE(p_hwfn, false,
"Failed to allocate dbg user info structure\n");
+ rc = (enum _ecore_status_t)debug_status;
goto alloc_err;
}
- rc = OSAL_DBG_ALLOC_USER_DATA(p_hwfn, &p_hwfn->dbg_user_info);
- if (rc) {
+ debug_status = OSAL_DBG_ALLOC_USER_DATA(p_hwfn,
+ &p_hwfn->dbg_user_info);
+ if (debug_status) {
DP_NOTICE(p_hwfn, false,
"Failed to allocate dbg user info structure\n");
+ rc = (enum _ecore_status_t)debug_status;
goto alloc_err;
}
} /* hwfn loop */
return ECORE_IO;
}
- OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + PCI_EXP_DEVCTL, &ctrl);
+ OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + RTE_PCI_EXP_DEVCTL, &ctrl);
wr_mbs = (ctrl & PCI_EXP_DEVCTL_PAYLOAD) >> 5;
ecore_wr(p_hwfn, p_ptt, PSWRQ2_REG_WR_MBS0, wr_mbs);
u32 tmp;
/* Read Vendor Id / Device Id */
- OSAL_PCI_READ_CONFIG_WORD(p_dev, PCICFG_VENDOR_ID_OFFSET,
+ OSAL_PCI_READ_CONFIG_WORD(p_dev, RTE_PCI_VENDOR_ID,
&p_dev->vendor_id);
- OSAL_PCI_READ_CONFIG_WORD(p_dev, PCICFG_DEVICE_ID_OFFSET,
+ OSAL_PCI_READ_CONFIG_WORD(p_dev, RTE_PCI_DEVICE_ID,
&p_dev->device_id);
/* Determine type */
((u8 *)fw_lsb)[1] = mac[4];
}
+void ecore_set_platform_str(struct ecore_hwfn *p_hwfn,
+ char *buf_str, u32 buf_size)
+{
+ u32 len;
+
+ OSAL_SNPRINTF(buf_str, buf_size, "Ecore %d.%d.%d.%d. ",
+ ECORE_MAJOR_VERSION, ECORE_MINOR_VERSION,
+ ECORE_REVISION_VERSION, ECORE_ENGINEERING_VERSION);
+
+ len = OSAL_STRLEN(buf_str);
+ OSAL_SET_PLATFORM_STR(p_hwfn, &buf_str[len], buf_size - len);
+}
+
bool ecore_is_mf_fip_special(struct ecore_dev *p_dev)
{
return !!OSAL_GET_BIT(ECORE_MF_FIP_SPECIAL, &p_dev->mf_bits);