net/qede/base: add pretend function for port/PF

[dpdk.git] / drivers / net / qede / base / ecore_hw.c

diff --git a/drivers/net/qede/base/ecore_hw.c b/drivers/net/qede/base/ecore_hw.c
index 1e76509..6cfbbab 100644 (file)
--- a/drivers/net/qede/base/ecore_hw.c
+++ b/drivers/net/qede/base/ecore_hw.c
@@ -1,9 +1,7 @@
-/*
- * Copyright (c) 2016 QLogic Corporation.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2016 - 2018 Cavium Inc.
  * All rights reserved.
- * www.qlogic.com
- *
- * See LICENSE.qede_pmd for copyright and licensing details.
+ * www.cavium.com
  */
 
 #include "bcm_osal.h"
@@ -38,6 +36,12 @@ struct ecore_ptt_pool {
        struct ecore_ptt ptts[PXP_EXTERNAL_BAR_PF_WINDOW_NUM];
 };
 
+void __ecore_ptt_pool_free(struct ecore_hwfn *p_hwfn)
+{
+       OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_ptt_pool);
+       p_hwfn->p_ptt_pool = OSAL_NULL;
+}
+
 enum _ecore_status_t ecore_ptt_pool_alloc(struct ecore_hwfn *p_hwfn)
 {
        struct ecore_ptt_pool *p_pool = OSAL_ALLOC(p_hwfn->p_dev,
@@ -65,10 +69,12 @@ enum _ecore_status_t ecore_ptt_pool_alloc(struct ecore_hwfn *p_hwfn)
 
        p_hwfn->p_ptt_pool = p_pool;
 #ifdef CONFIG_ECORE_LOCK_ALLOC
-       OSAL_SPIN_LOCK_ALLOC(p_hwfn, &p_pool->lock);
+       if (OSAL_SPIN_LOCK_ALLOC(p_hwfn, &p_pool->lock)) {
+               __ecore_ptt_pool_free(p_hwfn);
+               return ECORE_NOMEM;
+       }
 #endif
        OSAL_SPIN_LOCK_INIT(&p_pool->lock);
-
        return ECORE_SUCCESS;
 }
 
@@ -89,7 +95,7 @@ void ecore_ptt_pool_free(struct ecore_hwfn *p_hwfn)
        if (p_hwfn->p_ptt_pool)
                OSAL_SPIN_LOCK_DEALLOC(&p_hwfn->p_ptt_pool->lock);
 #endif
-       OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_ptt_pool);
+       __ecore_ptt_pool_free(p_hwfn);
 }
 
 struct ecore_ptt *ecore_ptt_acquire(struct ecore_hwfn *p_hwfn)
@@ -401,6 +407,30 @@ void ecore_port_unpretend(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
                        *(u32 *)&p_ptt->pxp.pretend);
 }
 
+void ecore_port_fid_pretend(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+                           u8 port_id, u16 fid)
+{
+       u16 control = 0;
+
+       SET_FIELD(control, PXP_PRETEND_CMD_PORT, port_id);
+       SET_FIELD(control, PXP_PRETEND_CMD_USE_PORT, 1);
+       SET_FIELD(control, PXP_PRETEND_CMD_PRETEND_PORT, 1);
+
+       SET_FIELD(control, PXP_PRETEND_CMD_IS_CONCRETE, 1);
+       SET_FIELD(control, PXP_PRETEND_CMD_PRETEND_FUNCTION, 1);
+
+       if (!GET_FIELD(fid, PXP_CONCRETE_FID_VFVALID))
+               fid = GET_FIELD(fid, PXP_CONCRETE_FID_PFID);
+
+       p_ptt->pxp.pretend.control = OSAL_CPU_TO_LE16(control);
+       p_ptt->pxp.pretend.fid.concrete_fid.fid = OSAL_CPU_TO_LE16(fid);
+
+       REG_WR(p_hwfn,
+              ecore_ptt_config_addr(p_ptt) +
+              OFFSETOF(struct pxp_ptt_entry, pretend),
+              *(u32 *)&p_ptt->pxp.pretend);
+}
+
 u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid)
 {
        u32 concrete_fid = 0;
@@ -569,7 +599,7 @@ enum _ecore_status_t ecore_dmae_info_alloc(struct ecore_hwfn *p_hwfn)
 
        *p_comp = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, p_addr, sizeof(u32));
        if (*p_comp == OSAL_NULL) {
-               DP_NOTICE(p_hwfn, true,
+               DP_NOTICE(p_hwfn, false,
                          "Failed to allocate `p_completion_word'\n");
                goto err;
        }
@@ -578,7 +608,7 @@ enum _ecore_status_t ecore_dmae_info_alloc(struct ecore_hwfn *p_hwfn)
        *p_cmd = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, p_addr,
                                         sizeof(struct dmae_cmd));
        if (*p_cmd == OSAL_NULL) {
-               DP_NOTICE(p_hwfn, true,
+               DP_NOTICE(p_hwfn, false,
                          "Failed to allocate `struct dmae_cmd'\n");
                goto err;
        }
@@ -587,7 +617,7 @@ enum _ecore_status_t ecore_dmae_info_alloc(struct ecore_hwfn *p_hwfn)
        *p_buff = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, p_addr,
                                          sizeof(u32) * DMAE_MAX_RW_SIZE);
        if (*p_buff == OSAL_NULL) {
-               DP_NOTICE(p_hwfn, true,
+               DP_NOTICE(p_hwfn, false,
                          "Failed to allocate `intermediate_buffer'\n");
                goto err;
        }
@@ -953,3 +983,74 @@ void ecore_hw_err_notify(struct ecore_hwfn *p_hwfn,
 
        OSAL_HW_ERROR_OCCURRED(p_hwfn, err_type);
 }
+
+enum _ecore_status_t ecore_dmae_sanity(struct ecore_hwfn *p_hwfn,
+                                      struct ecore_ptt *p_ptt,
+                                      const char *phase)
+{
+       u32 size = OSAL_PAGE_SIZE / 2, val;
+       struct ecore_dmae_params params;
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+       dma_addr_t p_phys;
+       void *p_virt;
+       u32 *p_tmp;
+
+       p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, &p_phys, 2 * size);
+       if (!p_virt) {
+               DP_NOTICE(p_hwfn, false,
+                         "DMAE sanity [%s]: failed to allocate memory\n",
+                         phase);
+               return ECORE_NOMEM;
+       }
+
+       /* Fill the bottom half of the allocated memory with a known pattern */
+       for (p_tmp = (u32 *)p_virt;
+            p_tmp < (u32 *)((u8 *)p_virt + size);
+            p_tmp++) {
+               /* Save the address itself as the value */
+               val = (u32)(osal_uintptr_t)p_tmp;
+               *p_tmp = val;
+       }
+
+       /* Zero the top half of the allocated memory */
+       OSAL_MEM_ZERO((u8 *)p_virt + size, size);
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
+                  "DMAE sanity [%s]: src_addr={phys 0x%lx, virt %p}, dst_addr={phys 0x%lx, virt %p}, size 0x%x\n",
+                  phase, (unsigned long)p_phys, p_virt,
+                  (unsigned long)(p_phys + size),
+                  (u8 *)p_virt + size, size);
+
+       OSAL_MEMSET(&params, 0, sizeof(params));
+       rc = ecore_dmae_host2host(p_hwfn, p_ptt, p_phys, p_phys + size,
+                                 size / 4 /* size_in_dwords */, &params);
+       if (rc != ECORE_SUCCESS) {
+               DP_NOTICE(p_hwfn, false,
+                         "DMAE sanity [%s]: ecore_dmae_host2host() failed. rc = %d.\n",
+                         phase, rc);
+               goto out;
+       }
+
+       /* Verify that the top half of the allocated memory has the pattern */
+       for (p_tmp = (u32 *)((u8 *)p_virt + size);
+            p_tmp < (u32 *)((u8 *)p_virt + (2 * size));
+            p_tmp++) {
+               /* The corresponding address in the bottom half */
+               val = (u32)(osal_uintptr_t)p_tmp - size;
+
+               if (*p_tmp != val) {
+                       DP_NOTICE(p_hwfn, false,
+                                 "DMAE sanity [%s]: addr={phys 0x%lx, virt %p}, read_val 0x%08x, expected_val 0x%08x\n",
+                                 phase,
+                                 (unsigned long)p_phys +
+                                  ((u8 *)p_tmp - (u8 *)p_virt),
+                                 p_tmp, *p_tmp, val);
+                       rc = ECORE_UNKNOWN_ERROR;
+                       goto out;
+               }
+       }
+
+out:
+       OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_virt, p_phys, 2 * size);
+       return rc;
+}