net/qede/base: fix multiple acquisition requests by VF

[dpdk.git] / drivers / net / qede / base / ecore_hw_defs.h

diff --git a/drivers/net/qede/base/ecore_hw_defs.h b/drivers/net/qede/base/ecore_hw_defs.h
index deb8e34..4456af4 100644 (file)
--- a/drivers/net/qede/base/ecore_hw_defs.h
+++ b/drivers/net/qede/base/ecore_hw_defs.h
@@ -10,19 +10,30 @@
 #define _ECORE_IGU_DEF_H_
 
 /* Fields of IGU PF CONFIGRATION REGISTER */
-#define IGU_PF_CONF_FUNC_EN       (0x1 << 0)   /* function enable        */
-#define IGU_PF_CONF_MSI_MSIX_EN   (0x1 << 1)   /* MSI/MSIX enable        */
-#define IGU_PF_CONF_INT_LINE_EN   (0x1 << 2)   /* INT enable             */
-#define IGU_PF_CONF_ATTN_BIT_EN   (0x1 << 3)   /* attention enable       */
-#define IGU_PF_CONF_SINGLE_ISR_EN (0x1 << 4)   /* single ISR mode enable */
-#define IGU_PF_CONF_SIMD_MODE     (0x1 << 5)   /* simd all ones mode     */
+/* function enable        */
+#define IGU_PF_CONF_FUNC_EN       (0x1 << 0)
+/* MSI/MSIX enable        */
+#define IGU_PF_CONF_MSI_MSIX_EN   (0x1 << 1)
+/* INT enable             */
+#define IGU_PF_CONF_INT_LINE_EN   (0x1 << 2)
+/* attention enable       */
+#define IGU_PF_CONF_ATTN_BIT_EN   (0x1 << 3)
+/* single ISR mode enable */
+#define IGU_PF_CONF_SINGLE_ISR_EN (0x1 << 4)
+/* simd all ones mode     */
+#define IGU_PF_CONF_SIMD_MODE     (0x1 << 5)
 
 /* Fields of IGU VF CONFIGRATION REGISTER */
-#define IGU_VF_CONF_FUNC_EN        (0x1 << 0)  /* function enable        */
-#define IGU_VF_CONF_MSI_MSIX_EN    (0x1 << 1)  /* MSI/MSIX enable        */
-#define IGU_VF_CONF_SINGLE_ISR_EN  (0x1 << 4)  /* single ISR mode enable */
-#define IGU_VF_CONF_PARENT_MASK    (0xF)       /* Parent PF              */
-#define IGU_VF_CONF_PARENT_SHIFT   5   /* Parent PF              */
+/* function enable        */
+#define IGU_VF_CONF_FUNC_EN        (0x1 << 0)
+/* MSI/MSIX enable        */
+#define IGU_VF_CONF_MSI_MSIX_EN    (0x1 << 1)
+/* single ISR mode enable */
+#define IGU_VF_CONF_SINGLE_ISR_EN  (0x1 << 4)
+/* Parent PF              */
+#define IGU_VF_CONF_PARENT_MASK    (0xF)
+/* Parent PF              */
+#define IGU_VF_CONF_PARENT_SHIFT   5
 
 /* Igu control commands
  */