drivers/crypto: check if name is null

[dpdk.git] / drivers / net / qede / base / ecore_l2.c

diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index adb5e47..4ab8fd5 100644 (file)
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -946,17 +946,17 @@ ecore_eth_pf_rx_queue_start(struct ecore_hwfn *p_hwfn,
                            dma_addr_t bd_chain_phys_addr,
                            dma_addr_t cqe_pbl_addr,
                            u16 cqe_pbl_size,
-                           void OSAL_IOMEM * *pp_producer)
+                           void OSAL_IOMEM * *pp_prod)
 {
        u32 init_prod_val = 0;
 
-       *pp_producer = (u8 OSAL_IOMEM *)
-                      p_hwfn->regview +
-                      GTT_BAR0_MAP_REG_MSDM_RAM +
-                      MSTORM_ETH_PF_PRODS_OFFSET(p_cid->abs.queue_id);
+       *pp_prod = (u8 OSAL_IOMEM *)
+                   p_hwfn->regview +
+                   GTT_BAR0_MAP_REG_MSDM_RAM +
+                   MSTORM_ETH_PF_PRODS_OFFSET(p_cid->abs.queue_id);
 
        /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
-       __internal_ram_wr(p_hwfn, *pp_producer, sizeof(u32),
+       __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
                          (u32 *)(&init_prod_val));
 
        return ecore_eth_rxq_start_ramrod(p_hwfn, p_cid,
@@ -2018,3 +2018,87 @@ void ecore_reset_vport_stats(struct ecore_dev *p_dev)
        else
                _ecore_get_vport_stats(p_dev, p_dev->reset_stats);
 }
+
+void ecore_arfs_mode_configure(struct ecore_hwfn *p_hwfn,
+                              struct ecore_ptt *p_ptt,
+                              struct ecore_arfs_config_params *p_cfg_params)
+{
+       if (p_cfg_params->arfs_enable) {
+               ecore_set_rfs_mode_enable(p_hwfn, p_ptt, p_hwfn->rel_pf_id,
+                                         p_cfg_params->tcp,
+                                         p_cfg_params->udp,
+                                         p_cfg_params->ipv4,
+                                         p_cfg_params->ipv6);
+               DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
+                          "tcp = %s, udp = %s, ipv4 = %s, ipv6 =%s\n",
+                          p_cfg_params->tcp ? "Enable" : "Disable",
+                          p_cfg_params->udp ? "Enable" : "Disable",
+                          p_cfg_params->ipv4 ? "Enable" : "Disable",
+                          p_cfg_params->ipv6 ? "Enable" : "Disable");
+       } else {
+               ecore_set_rfs_mode_disable(p_hwfn, p_ptt, p_hwfn->rel_pf_id);
+       }
+       DP_VERBOSE(p_hwfn, ECORE_MSG_SP, "Configured ARFS mode : %s\n",
+                  p_cfg_params->arfs_enable ? "Enable" : "Disable");
+}
+
+enum _ecore_status_t
+ecore_configure_rfs_ntuple_filter(struct ecore_hwfn *p_hwfn,
+                                 struct ecore_ptt *p_ptt,
+                                 struct ecore_spq_comp_cb *p_cb,
+                                 dma_addr_t p_addr, u16 length,
+                                 u16 qid, u8 vport_id,
+                                 bool b_is_add)
+{
+       struct rx_update_gft_filter_data *p_ramrod = OSAL_NULL;
+       struct ecore_spq_entry *p_ent = OSAL_NULL;
+       struct ecore_sp_init_data init_data;
+       u16 abs_rx_q_id = 0;
+       u8 abs_vport_id = 0;
+       enum _ecore_status_t rc = ECORE_NOTIMPL;
+
+       rc = ecore_fw_vport(p_hwfn, vport_id, &abs_vport_id);
+       if (rc != ECORE_SUCCESS)
+               return rc;
+
+       rc = ecore_fw_l2_queue(p_hwfn, qid, &abs_rx_q_id);
+       if (rc != ECORE_SUCCESS)
+               return rc;
+
+       /* Get SPQ entry */
+       OSAL_MEMSET(&init_data, 0, sizeof(init_data));
+       init_data.cid = ecore_spq_get_cid(p_hwfn);
+
+       init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
+
+       if (p_cb) {
+               init_data.comp_mode = ECORE_SPQ_MODE_CB;
+               init_data.p_comp_data = p_cb;
+       } else {
+               init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
+       }
+
+       rc = ecore_sp_init_request(p_hwfn, &p_ent,
+                                  ETH_RAMROD_GFT_UPDATE_FILTER,
+                                  PROTOCOLID_ETH, &init_data);
+       if (rc != ECORE_SUCCESS)
+               return rc;
+
+       p_ramrod = &p_ent->ramrod.rx_update_gft;
+
+       DMA_REGPAIR_LE(p_ramrod->pkt_hdr_addr, p_addr);
+       p_ramrod->pkt_hdr_length = OSAL_CPU_TO_LE16(length);
+       p_ramrod->rx_qid_or_action_icid = OSAL_CPU_TO_LE16(abs_rx_q_id);
+       p_ramrod->vport_id = abs_vport_id;
+       p_ramrod->filter_type = RFS_FILTER_TYPE;
+       p_ramrod->filter_action = b_is_add ? GFT_ADD_FILTER
+                                          : GFT_DELETE_FILTER;
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
+                  "V[%0x], Q[%04x] - %s filter from 0x%lx [length %04xb]\n",
+                  abs_vport_id, abs_rx_q_id,
+                  b_is_add ? "Adding" : "Removing",
+                  (unsigned long)p_addr, length);
+
+       return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
+}