net/qede/base: change MFW mailbox command log verbosity
[dpdk.git] / drivers / net / qede / base / ecore_mcp.c
index 1b6eb94..1a5152e 100644 (file)
@@ -177,10 +177,16 @@ enum _ecore_status_t ecore_mcp_free(struct ecore_hwfn *p_hwfn)
        return ECORE_SUCCESS;
 }
 
+/* Maximum of 1 sec to wait for the SHMEM ready indication */
+#define ECORE_MCP_SHMEM_RDY_MAX_RETRIES        20
+#define ECORE_MCP_SHMEM_RDY_ITER_MS    50
+
 static enum _ecore_status_t ecore_load_mcp_offsets(struct ecore_hwfn *p_hwfn,
                                                   struct ecore_ptt *p_ptt)
 {
        struct ecore_mcp_info *p_info = p_hwfn->mcp_info;
+       u8 cnt = ECORE_MCP_SHMEM_RDY_MAX_RETRIES;
+       u8 msec = ECORE_MCP_SHMEM_RDY_ITER_MS;
        u32 drv_mb_offsize, mfw_mb_offsize;
        u32 mcp_pf_id = MCP_PF_ID(p_hwfn);
 
@@ -198,6 +204,35 @@ static enum _ecore_status_t ecore_load_mcp_offsets(struct ecore_hwfn *p_hwfn,
 
        p_info->public_base |= GRCBASE_MCP;
 
+       /* Get the MFW MB address and number of supported messages */
+       mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt,
+                                 SECTION_OFFSIZE_ADDR(p_info->public_base,
+                                 PUBLIC_MFW_MB));
+       p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id);
+       p_info->mfw_mb_length = (u16)ecore_rd(p_hwfn, p_ptt,
+                                             p_info->mfw_mb_addr);
+
+       /* @@@TBD:
+        * The driver can notify that there was an MCP reset, and read the SHMEM
+        * values before the MFW has completed initializing them.
+        * As a temporary solution, the "sup_msgs" field is used as a data ready
+        * indication.
+        * This should be replaced with an actual indication when it is provided
+        * by the MFW.
+        */
+       while (!p_info->mfw_mb_length && cnt--) {
+               OSAL_MSLEEP(msec);
+               p_info->mfw_mb_length = (u16)ecore_rd(p_hwfn, p_ptt,
+                                                     p_info->mfw_mb_addr);
+       }
+
+       if (!cnt) {
+               DP_NOTICE(p_hwfn, false,
+                         "Failed to get the SHMEM ready notification after %d msec\n",
+                         ECORE_MCP_SHMEM_RDY_MAX_RETRIES * msec);
+               return ECORE_TIMEOUT;
+       }
+
        /* Calculate the driver and MFW mailbox address */
        drv_mb_offsize = ecore_rd(p_hwfn, p_ptt,
                                  SECTION_OFFSIZE_ADDR(p_info->public_base,
@@ -208,14 +243,6 @@ static enum _ecore_status_t ecore_load_mcp_offsets(struct ecore_hwfn *p_hwfn,
                   " mcp_pf_id = 0x%x\n",
                   drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id);
 
-       /* Set the MFW MB address */
-       mfw_mb_offsize = ecore_rd(p_hwfn, p_ptt,
-                                 SECTION_OFFSIZE_ADDR(p_info->public_base,
-                                                      PUBLIC_MFW_MB));
-       p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id);
-       p_info->mfw_mb_length = (u16)ecore_rd(p_hwfn, p_ptt,
-                                              p_info->mfw_mb_addr);
-
        /* Get the current driver mailbox sequence before sending
         * the first command
         */
@@ -442,7 +469,7 @@ static void __ecore_mcp_cmd_and_union(struct ecore_hwfn *p_hwfn,
        /* Set the drv command along with the sequence number */
        DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (p_mb_params->cmd | seq_num));
 
-       DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
+       DP_VERBOSE(p_hwfn, ECORE_MSG_HW,
                   "MFW mailbox: command 0x%08x param 0x%08x\n",
                   (p_mb_params->cmd | seq_num), p_mb_params->param);
 }
@@ -567,7 +594,7 @@ _ecore_mcp_cmd_and_union(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
        ecore_mcp_cmd_del_elem(p_hwfn, p_cmd_elem);
        OSAL_SPIN_UNLOCK(&p_hwfn->mcp_info->cmd_lock);
 
-       DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
+       DP_VERBOSE(p_hwfn, ECORE_MSG_HW,
                   "MFW mailbox: response 0x%08x param 0x%08x [after %d.%03d ms]\n",
                   p_mb_params->mcp_resp, p_mb_params->mcp_param,
                   (cnt * delay) / 1000, (cnt * delay) % 1000);
@@ -2201,8 +2228,10 @@ enum _ecore_status_t ecore_mcp_get_media_type(struct ecore_hwfn *p_hwfn,
 
 enum _ecore_status_t ecore_mcp_get_transceiver_data(struct ecore_hwfn *p_hwfn,
                                                    struct ecore_ptt *p_ptt,
-                                                   u32 *p_tranceiver_type)
+                                                   u32 *p_transceiver_state,
+                                                   u32 *p_transceiver_type)
 {
+       u32 transceiver_info;
        enum _ecore_status_t rc = ECORE_SUCCESS;
 
        /* TODO - Add support for VFs */
@@ -2213,14 +2242,23 @@ enum _ecore_status_t ecore_mcp_get_transceiver_data(struct ecore_hwfn *p_hwfn,
                DP_NOTICE(p_hwfn, false, "MFW is not initialized!\n");
                return ECORE_BUSY;
        }
-       if (!p_ptt) {
-               *p_tranceiver_type = ETH_TRANSCEIVER_TYPE_NONE;
-               rc = ECORE_INVAL;
+
+       *p_transceiver_type = ETH_TRANSCEIVER_TYPE_NONE;
+       *p_transceiver_state = ETH_TRANSCEIVER_STATE_UPDATING;
+
+       transceiver_info = ecore_rd(p_hwfn, p_ptt,
+                                   p_hwfn->mcp_info->port_addr +
+                                   offsetof(struct public_port,
+                                   transceiver_data));
+
+       *p_transceiver_state = GET_MFW_FIELD(transceiver_info,
+                                            ETH_TRANSCEIVER_STATE);
+
+       if (*p_transceiver_state == ETH_TRANSCEIVER_STATE_PRESENT) {
+               *p_transceiver_type = GET_MFW_FIELD(transceiver_info,
+                                           ETH_TRANSCEIVER_TYPE);
        } else {
-               *p_tranceiver_type = ecore_rd(p_hwfn, p_ptt,
-                               p_hwfn->mcp_info->port_addr +
-                               offsetof(struct public_port,
-                                       transceiver_data));
+               *p_transceiver_type = ETH_TRANSCEIVER_TYPE_UNKNOWN;
        }
 
        return rc;
@@ -2240,15 +2278,11 @@ enum _ecore_status_t ecore_mcp_trans_speed_mask(struct ecore_hwfn *p_hwfn,
                                                struct ecore_ptt *p_ptt,
                                                u32 *p_speed_mask)
 {
-       u32 transceiver_data, transceiver_type, transceiver_state;
+       u32 transceiver_type, transceiver_state;
 
-       ecore_mcp_get_transceiver_data(p_hwfn, p_ptt, &transceiver_data);
+       ecore_mcp_get_transceiver_data(p_hwfn, p_ptt, &transceiver_state,
+                                      &transceiver_type);
 
-       transceiver_state = GET_MFW_FIELD(transceiver_data,
-                           ETH_TRANSCEIVER_STATE);
-
-       transceiver_type = GET_MFW_FIELD(transceiver_data,
-                          ETH_TRANSCEIVER_TYPE);
 
        if (is_transceiver_ready(transceiver_state, transceiver_type) == 0)
                return ECORE_INVAL;
@@ -3046,11 +3080,11 @@ enum _ecore_status_t ecore_mcp_nvm_read(struct ecore_dev *p_dev, u32 addr,
 }
 
 enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd,
-                                       u32 addr, u8 *p_buf, u32 len)
+                                       u32 addr, u8 *p_buf, u32 *p_len)
 {
        struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
        struct ecore_ptt *p_ptt;
-       u32 resp, param;
+       u32 resp = 0, param;
        enum _ecore_status_t rc;
 
        p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -3061,7 +3095,7 @@ enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd,
                                  (cmd == ECORE_PHY_CORE_READ) ?
                                  DRV_MSG_CODE_PHY_CORE_READ :
                                  DRV_MSG_CODE_PHY_RAW_READ,
-                                 addr, &resp, &param, &len, (u32 *)p_buf);
+                                 addr, &resp, &param, p_len, (u32 *)p_buf);
        if (rc != ECORE_SUCCESS)
                DP_NOTICE(p_dev, false, "MCP command rc = %d\n", rc);
 
@@ -3090,7 +3124,7 @@ enum _ecore_status_t ecore_mcp_nvm_del_file(struct ecore_dev *p_dev, u32 addr)
 {
        struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
        struct ecore_ptt *p_ptt;
-       u32 resp, param;
+       u32 resp = 0, param;
        enum _ecore_status_t rc;
 
        p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -3109,7 +3143,7 @@ enum _ecore_status_t ecore_mcp_nvm_put_file_begin(struct ecore_dev *p_dev,
 {
        struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
        struct ecore_ptt *p_ptt;
-       u32 resp, param;
+       u32 resp = 0, param;
        enum _ecore_status_t rc;
 
        p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -3203,8 +3237,8 @@ enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd,
                                         u32 addr, u8 *p_buf, u32 len)
 {
        struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
+       u32 resp = 0, param, nvm_cmd;
        struct ecore_ptt *p_ptt;
-       u32 resp, param, nvm_cmd;
        enum _ecore_status_t rc;
 
        p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -4110,13 +4144,83 @@ ecore_mcp_drv_attribute(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
        return ECORE_SUCCESS;
 }
 
+enum _ecore_status_t ecore_mcp_get_engine_config(struct ecore_hwfn *p_hwfn,
+                                                struct ecore_ptt *p_ptt)
+{
+       struct ecore_dev *p_dev = p_hwfn->p_dev;
+       struct ecore_mcp_mb_params mb_params;
+       u8 fir_valid, l2_valid;
+       enum _ecore_status_t rc;
+
+       OSAL_MEM_ZERO(&mb_params, sizeof(mb_params));
+       mb_params.cmd = DRV_MSG_CODE_GET_ENGINE_CONFIG;
+       rc = ecore_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
+       if (rc != ECORE_SUCCESS)
+               return rc;
+
+       if (mb_params.mcp_resp == FW_MSG_CODE_UNSUPPORTED) {
+               DP_INFO(p_hwfn,
+                       "The get_engine_config command is unsupported by the MFW\n");
+               return ECORE_NOTIMPL;
+       }
+
+       fir_valid = GET_MFW_FIELD(mb_params.mcp_param,
+                                 FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALID);
+       if (fir_valid)
+               p_dev->fir_affin =
+                       GET_MFW_FIELD(mb_params.mcp_param,
+                                     FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALUE);
+
+       l2_valid = GET_MFW_FIELD(mb_params.mcp_param,
+                                FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALID);
+       if (l2_valid)
+               p_dev->l2_affin_hint =
+                       GET_MFW_FIELD(mb_params.mcp_param,
+                                     FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALUE);
+
+       DP_INFO(p_hwfn,
+               "Engine affinity config: FIR={valid %hhd, value %hhd}, L2_hint={valid %hhd, value %hhd}\n",
+               fir_valid, p_dev->fir_affin, l2_valid, p_dev->l2_affin_hint);
+
+       return ECORE_SUCCESS;
+}
+
+enum _ecore_status_t ecore_mcp_get_ppfid_bitmap(struct ecore_hwfn *p_hwfn,
+                                               struct ecore_ptt *p_ptt)
+{
+       struct ecore_dev *p_dev = p_hwfn->p_dev;
+       struct ecore_mcp_mb_params mb_params;
+       enum _ecore_status_t rc;
+
+       OSAL_MEM_ZERO(&mb_params, sizeof(mb_params));
+       mb_params.cmd = DRV_MSG_CODE_GET_PPFID_BITMAP;
+       rc = ecore_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
+       if (rc != ECORE_SUCCESS)
+               return rc;
+
+       if (mb_params.mcp_resp == FW_MSG_CODE_UNSUPPORTED) {
+               DP_INFO(p_hwfn,
+                       "The get_ppfid_bitmap command is unsupported by the MFW\n");
+               return ECORE_NOTIMPL;
+       }
+
+       p_dev->ppfid_bitmap = GET_MFW_FIELD(mb_params.mcp_param,
+                                           FW_MB_PARAM_PPFID_BITMAP);
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_SP, "PPFID bitmap 0x%hhx\n",
+                  p_dev->ppfid_bitmap);
+
+       return ECORE_SUCCESS;
+}
+
 void ecore_mcp_wol_wr(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
                      u32 offset, u32 val)
 {
-       struct ecore_mcp_mb_params mb_params = {0};
        enum _ecore_status_t       rc = ECORE_SUCCESS;
        u32                        dword = val;
+       struct ecore_mcp_mb_params mb_params;
 
+       OSAL_MEMSET(&mb_params, 0, sizeof(struct ecore_mcp_mb_params));
        mb_params.cmd = DRV_MSG_CODE_WRITE_WOL_REG;
        mb_params.param = offset;
        mb_params.p_data_src = &dword;