net/virtio: allocate vrings on device NUMA node

[dpdk.git] / drivers / net / qede / base / ecore_mcp.c

diff --git a/drivers/net/qede/base/ecore_mcp.c b/drivers/net/qede/base/ecore_mcp.c
index 3811d27..6c65606 100644 (file)
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -3084,7 +3084,7 @@ enum _ecore_status_t ecore_mcp_phy_read(struct ecore_dev *p_dev, u32 cmd,
 {
        struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
        struct ecore_ptt *p_ptt;
-       u32 resp, param;
+       u32 resp = 0, param;
        enum _ecore_status_t rc;
 
        p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -3124,7 +3124,7 @@ enum _ecore_status_t ecore_mcp_nvm_del_file(struct ecore_dev *p_dev, u32 addr)
 {
        struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
        struct ecore_ptt *p_ptt;
-       u32 resp, param;
+       u32 resp = 0, param;
        enum _ecore_status_t rc;
 
        p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -3143,7 +3143,7 @@ enum _ecore_status_t ecore_mcp_nvm_put_file_begin(struct ecore_dev *p_dev,
 {
        struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
        struct ecore_ptt *p_ptt;
-       u32 resp, param;
+       u32 resp = 0, param;
        enum _ecore_status_t rc;
 
        p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -3237,8 +3237,8 @@ enum _ecore_status_t ecore_mcp_phy_write(struct ecore_dev *p_dev, u32 cmd,
                                         u32 addr, u8 *p_buf, u32 len)
 {
        struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
+       u32 resp = 0, param, nvm_cmd;
        struct ecore_ptt *p_ptt;
-       u32 resp, param, nvm_cmd;
        enum _ecore_status_t rc;
 
        p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -4144,13 +4144,83 @@ ecore_mcp_drv_attribute(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
        return ECORE_SUCCESS;
 }
 
+enum _ecore_status_t ecore_mcp_get_engine_config(struct ecore_hwfn *p_hwfn,
+                                                struct ecore_ptt *p_ptt)
+{
+       struct ecore_dev *p_dev = p_hwfn->p_dev;
+       struct ecore_mcp_mb_params mb_params;
+       u8 fir_valid, l2_valid;
+       enum _ecore_status_t rc;
+
+       OSAL_MEM_ZERO(&mb_params, sizeof(mb_params));
+       mb_params.cmd = DRV_MSG_CODE_GET_ENGINE_CONFIG;
+       rc = ecore_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
+       if (rc != ECORE_SUCCESS)
+               return rc;
+
+       if (mb_params.mcp_resp == FW_MSG_CODE_UNSUPPORTED) {
+               DP_INFO(p_hwfn,
+                       "The get_engine_config command is unsupported by the MFW\n");
+               return ECORE_NOTIMPL;
+       }
+
+       fir_valid = GET_MFW_FIELD(mb_params.mcp_param,
+                                 FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALID);
+       if (fir_valid)
+               p_dev->fir_affin =
+                       GET_MFW_FIELD(mb_params.mcp_param,
+                                     FW_MB_PARAM_ENG_CFG_FIR_AFFIN_VALUE);
+
+       l2_valid = GET_MFW_FIELD(mb_params.mcp_param,
+                                FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALID);
+       if (l2_valid)
+               p_dev->l2_affin_hint =
+                       GET_MFW_FIELD(mb_params.mcp_param,
+                                     FW_MB_PARAM_ENG_CFG_L2_AFFIN_VALUE);
+
+       DP_INFO(p_hwfn,
+               "Engine affinity config: FIR={valid %hhd, value %hhd}, L2_hint={valid %hhd, value %hhd}\n",
+               fir_valid, p_dev->fir_affin, l2_valid, p_dev->l2_affin_hint);
+
+       return ECORE_SUCCESS;
+}
+
+enum _ecore_status_t ecore_mcp_get_ppfid_bitmap(struct ecore_hwfn *p_hwfn,
+                                               struct ecore_ptt *p_ptt)
+{
+       struct ecore_dev *p_dev = p_hwfn->p_dev;
+       struct ecore_mcp_mb_params mb_params;
+       enum _ecore_status_t rc;
+
+       OSAL_MEM_ZERO(&mb_params, sizeof(mb_params));
+       mb_params.cmd = DRV_MSG_CODE_GET_PPFID_BITMAP;
+       rc = ecore_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
+       if (rc != ECORE_SUCCESS)
+               return rc;
+
+       if (mb_params.mcp_resp == FW_MSG_CODE_UNSUPPORTED) {
+               DP_INFO(p_hwfn,
+                       "The get_ppfid_bitmap command is unsupported by the MFW\n");
+               return ECORE_NOTIMPL;
+       }
+
+       p_dev->ppfid_bitmap = GET_MFW_FIELD(mb_params.mcp_param,
+                                           FW_MB_PARAM_PPFID_BITMAP);
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_SP, "PPFID bitmap 0x%hhx\n",
+                  p_dev->ppfid_bitmap);
+
+       return ECORE_SUCCESS;
+}
+
 void ecore_mcp_wol_wr(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
                      u32 offset, u32 val)
 {
-       struct ecore_mcp_mb_params mb_params = {0};
        enum _ecore_status_t       rc = ECORE_SUCCESS;
        u32                        dword = val;
+       struct ecore_mcp_mb_params mb_params;
 
+       OSAL_MEMSET(&mb_params, 0, sizeof(struct ecore_mcp_mb_params));
        mb_params.cmd = DRV_MSG_CODE_WRITE_WOL_REG;
        mb_params.param = offset;
        mb_params.p_data_src = &dword;