net/qede/base: change queue/sb-id from 8 bit to 16 bit

[dpdk.git] / drivers / net / qede / base / ecore_sriov.c

diff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c
index 4c1a078..6e86966 100644 (file)
--- a/drivers/net/qede/base/ecore_sriov.c
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -554,7 +554,6 @@ void ecore_iov_free(struct ecore_hwfn *p_hwfn)
 void ecore_iov_free_hw_info(struct ecore_dev *p_dev)
 {
        OSAL_FREE(p_dev, p_dev->p_iov_info);
-       p_dev->p_iov_info = OSAL_NULL;
 }
 
 enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn *p_hwfn)
@@ -597,18 +596,33 @@ enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn *p_hwfn)
                DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
                           "IOV capabilities, but no VFs are published\n");
                OSAL_FREE(p_dev, p_dev->p_iov_info);
-               p_dev->p_iov_info = OSAL_NULL;
                return ECORE_SUCCESS;
        }
 
-       /* Calculate the first VF index - this is a bit tricky; Basically,
-        * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
-        * after the first engine's VFs.
+       /* First VF index based on offset is tricky:
+        *  - If ARI is supported [likely], offset - (16 - pf_id) would
+        *    provide the number for eng0. 2nd engine Vfs would begin
+        *    after the first engine's VFs.
+        *  - If !ARI, VFs would start on next device.
+        *    so offset - (256 - pf_id) would provide the number.
+        * Utilize the fact that (256 - pf_id) is achieved only be later
+        * to diffrentiate between the two.
         */
-       p_dev->p_iov_info->first_vf_in_pf = p_hwfn->p_dev->p_iov_info->offset +
-                                           p_hwfn->abs_pf_id - 16;
-       if (ECORE_PATH_ID(p_hwfn))
-               p_dev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
+
+       if (p_hwfn->p_dev->p_iov_info->offset < (256 - p_hwfn->abs_pf_id)) {
+               u32 first = p_hwfn->p_dev->p_iov_info->offset +
+                           p_hwfn->abs_pf_id - 16;
+
+               p_dev->p_iov_info->first_vf_in_pf = first;
+
+               if (ECORE_PATH_ID(p_hwfn))
+                       p_dev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
+       } else {
+               u32 first = p_hwfn->p_dev->p_iov_info->offset +
+                           p_hwfn->abs_pf_id - 256;
+
+               p_dev->p_iov_info->first_vf_in_pf = first;
+       }
 
        DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
                   "First VF in hwfn 0x%08x\n",
@@ -2002,7 +2016,7 @@ static void ecore_iov_vf_mbx_start_rxq(struct ecore_hwfn *p_hwfn,
        params.queue_id = (u8)vf->vf_queues[req->rx_qid].fw_rx_qid;
        params.vf_qid = req->rx_qid;
        params.vport_id = vf->vport_id;
-       params.stats_id = vf->abs_vf_id + 0x10,
+       params.stats_id = vf->abs_vf_id + 0x10;
        params.sb = req->hw_sb;
        params.sb_idx = req->sb_index;
 
@@ -2104,10 +2118,10 @@ static void ecore_iov_vf_mbx_start_txq(struct ecore_hwfn *p_hwfn,
            !ecore_iov_validate_sb(p_hwfn, vf, req->hw_sb))
                goto out;
 
-       params.queue_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
-       params.qzone_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
+       params.queue_id = vf->vf_queues[req->tx_qid].fw_tx_qid;
+       params.qzone_id = vf->vf_queues[req->tx_qid].fw_tx_qid;
        params.vport_id = vf->vport_id;
-       params.stats_id = vf->abs_vf_id + 0x10,
+       params.stats_id = vf->abs_vf_id + 0x10;
        params.sb = req->hw_sb;
        params.sb_idx = req->sb_index;
 
@@ -3075,6 +3089,13 @@ ecore_iov_execute_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
                        return rc;
                }
 
+               /* Workaround to make VF-PF channel ready, as FW
+                * doesn't do that as a part of FLR.
+                */
+               REG_WR(p_hwfn,
+                      GTT_BAR0_MAP_REG_USDM_RAM +
+                      USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
+
                /* VF_STOPPED has to be set only after final cleanup
                 * but prior to re-enabling the VF.
                 */
@@ -3143,7 +3164,7 @@ ecore_iov_single_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
 
 bool ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *p_disabled_vfs)
 {
-       bool found;
+       bool found = false;
        u16 i;
 
        DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "Marking FLR-ed VFs\n");
@@ -3466,7 +3487,7 @@ u16 ecore_iov_get_next_active_vf(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
                        return i;
 
 out:
-       return MAX_NUM_VFS;
+       return E4_MAX_NUM_VFS;
 }
 
 enum _ecore_status_t ecore_iov_copy_vf_msg(struct ecore_hwfn *p_hwfn,