-/*
- * Copyright (c) 2016 QLogic Corporation.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2016 - 2018 Cavium Inc.
* All rights reserved.
- * www.qlogic.com
- *
- * See LICENSE.qede_pmd for copyright and licensing details.
+ * www.cavium.com
*/
#include <limits.h>
-#include <time.h>
+
#include <rte_alarm.h>
+#include <rte_string_fns.h>
+
+#include "eal_firmware.h"
#include "qede_ethdev.h"
+/* ######### DEBUG ###########*/
+#include "qede_debug.h"
/* Alarm timeout. */
#define QEDE_ALARM_TIMEOUT_US 100000
/* Global variable to hold absolute path of fw file */
-char fw_file[PATH_MAX];
+char qede_fw_file[PATH_MAX];
-const char *QEDE_DEFAULT_FIRMWARE =
- "/lib/firmware/qed/qed_init_values-8.30.12.0.bin";
+static const char * const QEDE_DEFAULT_FIRMWARE =
+ "/lib/firmware/qed/qed_init_values-8.40.33.0.bin";
static void
qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
edev->regview = pci_dev->mem_resource[0].addr;
edev->doorbells = pci_dev->mem_resource[2].addr;
edev->db_size = pci_dev->mem_resource[2].len;
+ edev->pci_dev = pci_dev;
}
static int
qed_init_pci(edev, pci_dev);
memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
+
+ if (is_vf)
+ hw_prepare_params.acquire_retry_cnt = ECORE_VF_ACQUIRE_THRESH;
+
hw_prepare_params.personality = ECORE_PCI_ETH;
hw_prepare_params.drv_resc_alloc = false;
hw_prepare_params.chk_reg_fifo = false;
hw_prepare_params.initiate_pf_flr = true;
hw_prepare_params.allow_mdump = false;
- hw_prepare_params.epoch = (u32)time(NULL);
+ hw_prepare_params.b_en_pacing = false;
+ hw_prepare_params.epoch = OSAL_GET_EPOCH(ECORE_LEADING_HWFN(edev));
rc = ecore_hw_prepare(edev, &hw_prepare_params);
if (rc) {
DP_ERR(edev, "hw prepare failed\n");
#ifdef CONFIG_ECORE_BINARY_FW
static int qed_load_firmware_data(struct ecore_dev *edev)
{
- int fd;
- struct stat st;
const char *fw = RTE_LIBRTE_QEDE_FW;
+ void *buf;
+ size_t bufsz;
+ int ret;
if (strcmp(fw, "") == 0)
- strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
+ strcpy(qede_fw_file, QEDE_DEFAULT_FIRMWARE);
else
- strcpy(fw_file, fw);
+ strcpy(qede_fw_file, fw);
- fd = open(fw_file, O_RDONLY);
- if (fd < 0) {
- DP_ERR(edev, "Can't open firmware file\n");
- return -ENOENT;
- }
-
- if (fstat(fd, &st) < 0) {
- DP_ERR(edev, "Can't stat firmware file\n");
- close(fd);
+ if (rte_firmware_read(qede_fw_file, &buf, &bufsz) < 0) {
+ DP_ERR(edev, "Can't read firmware data: %s\n", qede_fw_file);
return -1;
}
- edev->firmware = rte_zmalloc("qede_fw", st.st_size,
- RTE_CACHE_LINE_SIZE);
+ edev->firmware = rte_zmalloc("qede_fw", bufsz, RTE_CACHE_LINE_SIZE);
if (!edev->firmware) {
DP_ERR(edev, "Can't allocate memory for firmware\n");
- close(fd);
- return -ENOMEM;
- }
-
- if (read(fd, edev->firmware, st.st_size) != st.st_size) {
- DP_ERR(edev, "Can't read firmware data\n");
- close(fd);
- return -1;
+ ret = -ENOMEM;
+ goto out;
}
- edev->fw_len = st.st_size;
+ memcpy(edev->firmware, buf, bufsz);
+ edev->fw_len = bufsz;
if (edev->fw_len < 104) {
DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n",
edev->fw_len);
- close(fd);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
-
- close(fd);
- return 0;
+ ret = 0;
+out:
+ free(buf);
+ return ret;
}
#endif
rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
/* Always update link configuration according to bulletin */
- qed_link_update(hwfn, NULL);
+ qed_link_update(hwfn);
}
static void qede_vf_task(void *arg)
for_each_hwfn(edev, i) {
p_hwfn = &edev->hwfns[i];
- if (!IS_PF(edev))
+ if (IS_PF(edev))
+ rte_eal_alarm_cancel(qed_iov_pf_task, p_hwfn);
+ else
rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
}
}
#ifdef CONFIG_ECORE_BINARY_FW
rc = qed_load_firmware_data(edev);
if (rc) {
- DP_ERR(edev, "Failed to find fw file %s\n", fw_file);
+ DP_ERR(edev, "Failed to find fw file %s\n",
+ qede_fw_file);
goto err;
}
#endif
qed_start_iov_task(edev);
#ifdef CONFIG_ECORE_BINARY_FW
- if (IS_PF(edev))
+ if (IS_PF(edev)) {
data = (const uint8_t *)edev->firmware + sizeof(u32);
+
+ /* ############### DEBUG ################## */
+ qed_dbg_pf_init(edev);
+ }
#endif
+
/* Start the slowpath */
memset(&hw_init_params, 0, sizeof(hw_init_params));
hw_init_params.b_hw_start = true;
- hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
+ hw_init_params.int_mode = params->int_mode;
hw_init_params.allow_npar_tx_switch = true;
hw_init_params.bin_fw_data = data;
drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
drv_load_params.avoid_eng_reset = false;
drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS;
+ hw_init_params.avoid_eng_affin = false;
hw_init_params.p_drv_load_params = &drv_load_params;
rc = ecore_hw_init(edev, &hw_init_params);
drv_version.version = (params->drv_major << 24) |
(params->drv_minor << 16) |
(params->drv_rev << 8) | (params->drv_eng);
- /* TBD: strlcpy() */
- strncpy((char *)drv_version.name, (const char *)params->name,
- MCP_DRV_VER_STR_SIZE - 4);
+ strlcpy((char *)drv_version.name, (const char *)params->name,
+ sizeof(drv_version.name));
rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
&drv_version);
if (rc) {
dev_info->dev_type = edev->type;
rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
- ETHER_ADDR_LEN);
+ RTE_ETHER_ADDR_LEN);
dev_info->fw_major = FW_MAJOR_VERSION;
dev_info->fw_minor = FW_MINOR_VERSION;
dev_info->fw_eng = FW_ENGINEERING_VERSION;
if (IS_PF(edev)) {
- dev_info->mf_mode = edev->mf_mode;
+ dev_info->b_inter_pf_switch =
+ OSAL_GET_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits);
+ if (!OSAL_GET_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits))
+ dev_info->b_arfs_capable = true;
dev_info->tx_switching = false;
dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn);
ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
&dev_info->mfw_rev, NULL);
+ ecore_mcp_get_mbi_ver(ECORE_LEADING_HWFN(edev), ptt,
+ &dev_info->mbi_version);
+
ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
&dev_info->flash_size);
max_vf_vlan_filters;
rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
- ETHER_ADDR_LEN);
+ RTE_ETHER_ADDR_LEN);
} else {
ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
&info->num_queues);
qed_fill_dev_info(edev, &info->common);
if (IS_VF(edev))
- memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
+ memset(&info->common.hw_mac, 0, RTE_ETHER_ADDR_LEN);
return 0;
}
hwfn = &edev->hwfns[0];
if (IS_PF(edev)) {
ptt = ecore_ptt_acquire(hwfn);
- if (!ptt)
- DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n");
-
+ if (ptt) {
qed_fill_link(hwfn, ptt, if_link);
-
- if (ptt)
ecore_ptt_release(hwfn, ptt);
+ } else {
+ DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n");
+ }
} else {
qed_fill_link(hwfn, NULL, if_link);
}
return rc;
}
-void qed_link_update(struct ecore_hwfn *hwfn, struct ecore_ptt *ptt)
+void qed_link_update(struct ecore_hwfn *hwfn)
{
- struct qed_link_output if_link;
+ struct ecore_dev *edev = hwfn->p_dev;
+ struct qede_dev *qdev = (struct qede_dev *)edev;
+ struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev;
+ int rc;
+
+ rc = qede_link_update(dev, 0);
+ qed_inform_vf_link_state(hwfn);
- qed_fill_link(hwfn, ptt, &if_link);
+ if (!rc)
+ rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
}
static int qed_drain(struct ecore_dev *edev)
INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
INIT_STRUCT_FIELD(remove, &qed_remove),
INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),
+ /* ############### DEBUG ####################*/
+
+ INIT_STRUCT_FIELD(dbg_get_debug_engine, &qed_get_debug_engine),
+ INIT_STRUCT_FIELD(dbg_set_debug_engine, &qed_set_debug_engine),
+
+ INIT_STRUCT_FIELD(dbg_protection_override,
+ &qed_dbg_protection_override),
+ INIT_STRUCT_FIELD(dbg_protection_override_size,
+ &qed_dbg_protection_override_size),
+
+ INIT_STRUCT_FIELD(dbg_grc, &qed_dbg_grc),
+ INIT_STRUCT_FIELD(dbg_grc_size, &qed_dbg_grc_size),
+
+ INIT_STRUCT_FIELD(dbg_idle_chk, &qed_dbg_idle_chk),
+ INIT_STRUCT_FIELD(dbg_idle_chk_size, &qed_dbg_idle_chk_size),
+
+ INIT_STRUCT_FIELD(dbg_mcp_trace, &qed_dbg_mcp_trace),
+ INIT_STRUCT_FIELD(dbg_mcp_trace_size, &qed_dbg_mcp_trace_size),
+
+ INIT_STRUCT_FIELD(dbg_fw_asserts, &qed_dbg_fw_asserts),
+ INIT_STRUCT_FIELD(dbg_fw_asserts_size, &qed_dbg_fw_asserts_size),
+
+ INIT_STRUCT_FIELD(dbg_ilt, &qed_dbg_ilt),
+ INIT_STRUCT_FIELD(dbg_ilt_size, &qed_dbg_ilt_size),
+
+ INIT_STRUCT_FIELD(dbg_reg_fifo_size, &qed_dbg_reg_fifo_size),
+ INIT_STRUCT_FIELD(dbg_reg_fifo, &qed_dbg_reg_fifo),
+
+ INIT_STRUCT_FIELD(dbg_igu_fifo_size, &qed_dbg_igu_fifo_size),
+ INIT_STRUCT_FIELD(dbg_igu_fifo, &qed_dbg_igu_fifo),
};
const struct qed_eth_ops qed_eth_ops_pass = {
INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
+ INIT_STRUCT_FIELD(sriov_configure, &qed_sriov_configure),
};
const struct qed_eth_ops *qed_get_eth_ops(void)
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