-/*
- * Copyright (c) 2015-2016 Solarflare Communications Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+/* SPDX-License-Identifier: BSD-3-Clause
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * The views and conclusions contained in the software and documentation are
- * those of the authors and should not be interpreted as representing official
- * policies, either expressed or implied, of the FreeBSD Project.
+ * Copyright (c) 2015-2018 Solarflare Communications Inc.
+ * All rights reserved.
*/
#ifndef _SYS_EF10_IMPL_H
extern "C" {
#endif
-#if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
-#define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
-#elif EFSYS_OPT_HUNTINGTON
-#define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
-#elif EFSYS_OPT_MEDFORD
-#define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
-#endif
+#define EF10_EVQ_MAXNEVS 32768
+#define EF10_EVQ_MINNEVS 512
+
+#define EF10_RXQ_MAXNDESCS 4096
+#define EF10_RXQ_MINNDESCS 512
+
+#define EF10_TXQ_MINNDESCS 512
+
+#define EF10_EVQ_DESC_SIZE (sizeof (efx_qword_t))
+#define EF10_RXQ_DESC_SIZE (sizeof (efx_qword_t))
+#define EF10_TXQ_DESC_SIZE (sizeof (efx_qword_t))
+
+/* Number of hardware EVQ buffers (for compile-time resource dimensions) */
+#define EF10_EVQ_MAXNBUFS (64)
+
+/* Maximum independent of EFX_BUG35388_WORKAROUND. */
+#define EF10_TXQ_MAXNBUFS 8
+
+#if EFSYS_OPT_HUNTINGTON
+# if (EF10_EVQ_MAXNBUFS < HUNT_EVQ_MAXNBUFS)
+# error "EF10_EVQ_MAXNBUFS too small"
+# endif
+#endif /* EFSYS_OPT_HUNTINGTON */
+#if EFSYS_OPT_MEDFORD
+# if (EF10_EVQ_MAXNBUFS < MEDFORD_EVQ_MAXNBUFS)
+# error "EF10_EVQ_MAXNBUFS too small"
+# endif
+#endif /* EFSYS_OPT_MEDFORD */
+#if EFSYS_OPT_MEDFORD2
+# if (EF10_EVQ_MAXNBUFS < MEDFORD2_EVQ_MAXNBUFS)
+# error "EF10_EVQ_MAXNBUFS too small"
+# endif
+#endif /* EFSYS_OPT_MEDFORD2 */
+
+/* Number of hardware PIO buffers (for compile-time resource dimensions) */
+#define EF10_MAX_PIOBUF_NBUFS (16)
+
+#if EFSYS_OPT_HUNTINGTON
+# if (EF10_MAX_PIOBUF_NBUFS < HUNT_PIOBUF_NBUFS)
+# error "EF10_MAX_PIOBUF_NBUFS too small"
+# endif
+#endif /* EFSYS_OPT_HUNTINGTON */
+#if EFSYS_OPT_MEDFORD
+# if (EF10_MAX_PIOBUF_NBUFS < MEDFORD_PIOBUF_NBUFS)
+# error "EF10_MAX_PIOBUF_NBUFS too small"
+# endif
+#endif /* EFSYS_OPT_MEDFORD */
+#if EFSYS_OPT_MEDFORD2
+# if (EF10_MAX_PIOBUF_NBUFS < MEDFORD2_PIOBUF_NBUFS)
+# error "EF10_MAX_PIOBUF_NBUFS too small"
+# endif
+#endif /* EFSYS_OPT_MEDFORD2 */
+
+
/*
* FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
*/
#define EF10_NVRAM_CHUNK 0x80
-/* Alignment requirement for value written to RX WPTR:
- * the WPTR must be aligned to an 8 descriptor boundary
+/*
+ * Alignment requirement for value written to RX WPTR: the WPTR must be aligned
+ * to an 8 descriptor boundary.
*/
#define EF10_RX_WPTR_ALIGN 8
__in efx_nic_t *enp,
__in unsigned int index,
__in efsys_mem_t *esmp,
- __in size_t n,
+ __in size_t ndescs,
__in uint32_t id,
__in uint32_t us,
__in uint32_t flags,
__in efx_evq_t *eep,
__in efx_rxq_t *erp,
__in unsigned int label,
- __in boolean_t packed_stream);
+ __in efx_rxq_type_t type);
void
ef10_ev_rxlabel_fini(
/* NIC */
+extern __checkReturn efx_rc_t
+efx_mcdi_vadaptor_alloc(
+ __in efx_nic_t *enp,
+ __in uint32_t port_id);
+
+extern __checkReturn efx_rc_t
+efx_mcdi_vadaptor_free(
+ __in efx_nic_t *enp,
+ __in uint32_t port_id);
+
extern __checkReturn efx_rc_t
ef10_nic_probe(
__in efx_nic_t *enp);
ef10_nic_init(
__in efx_nic_t *enp);
+extern __checkReturn boolean_t
+ef10_nic_hw_unavailable(
+ __in efx_nic_t *enp);
+
+extern void
+ef10_nic_set_hw_unavailable(
+ __in efx_nic_t *enp);
+
#if EFSYS_OPT_DIAG
extern __checkReturn efx_rc_t
__in uint32_t partn,
__out size_t *sizep);
+extern __checkReturn efx_rc_t
+ef10_nvram_partn_info(
+ __in efx_nic_t *enp,
+ __in uint32_t partn,
+ __out efx_nvram_info_t * enip);
+
extern __checkReturn efx_rc_t
ef10_nvram_partn_rw_start(
__in efx_nic_t *enp,
__out_bcount(size) caddr_t data,
__in size_t size);
+extern __checkReturn efx_rc_t
+ef10_nvram_partn_read_backup(
+ __in efx_nic_t *enp,
+ __in uint32_t partn,
+ __in unsigned int offset,
+ __out_bcount(size) caddr_t data,
+ __in size_t size);
+
extern __checkReturn efx_rc_t
ef10_nvram_partn_erase(
__in efx_nic_t *enp,
__in efx_nic_t *enp,
__in uint32_t partn,
__in unsigned int offset,
- __out_bcount(size) caddr_t data,
+ __in_bcount(size) caddr_t data,
__in size_t size);
extern __checkReturn efx_rc_t
ef10_nvram_partn_rw_finish(
__in efx_nic_t *enp,
- __in uint32_t partn);
+ __in uint32_t partn,
+ __out_opt uint32_t *verify_resultp);
extern __checkReturn efx_rc_t
ef10_nvram_partn_get_version(
extern __checkReturn efx_rc_t
ef10_nvram_buffer_validate(
- __in efx_nic_t *enp,
__in uint32_t partn,
__in_bcount(buffer_size)
caddr_t bufferp,
__in size_t buffer_size);
+extern void
+ef10_nvram_buffer_init(
+ __out_bcount(buffer_size)
+ caddr_t bufferp,
+ __in size_t buffer_size);
+
extern __checkReturn efx_rc_t
ef10_nvram_buffer_create(
- __in efx_nic_t *enp,
- __in uint16_t partn_type,
- __in_bcount(buffer_size)
+ __in uint32_t partn_type,
+ __out_bcount(buffer_size)
caddr_t bufferp,
__in size_t buffer_size);
__in_bcount(buffer_size)
caddr_t bufferp,
__in size_t buffer_size,
- __out uint32_t *startp
- );
+ __out uint32_t *startp);
extern __checkReturn efx_rc_t
ef10_nvram_buffer_find_end(
caddr_t bufferp,
__in size_t buffer_size,
__in uint32_t offset,
- __out uint32_t *endp
- );
+ __out uint32_t *endp);
extern __checkReturn __success(return != B_FALSE) boolean_t
ef10_nvram_buffer_find_item(
__in size_t buffer_size,
__in uint32_t offset,
__out uint32_t *startp,
- __out uint32_t *lengthp
- );
+ __out uint32_t *lengthp);
+
+extern __checkReturn efx_rc_t
+ef10_nvram_buffer_peek_item(
+ __in_bcount(buffer_size)
+ caddr_t bufferp,
+ __in size_t buffer_size,
+ __in uint32_t offset,
+ __out uint32_t *tagp,
+ __out uint32_t *lengthp,
+ __out uint32_t *value_offsetp);
extern __checkReturn efx_rc_t
ef10_nvram_buffer_get_item(
__in size_t buffer_size,
__in uint32_t offset,
__in uint32_t length,
- __out_bcount_part(item_max_size, *lengthp)
- caddr_t itemp,
- __in size_t item_max_size,
- __out uint32_t *lengthp
- );
+ __out uint32_t *tagp,
+ __out_bcount_part(value_max_size, *lengthp)
+ caddr_t valuep,
+ __in size_t value_max_size,
+ __out uint32_t *lengthp);
extern __checkReturn efx_rc_t
ef10_nvram_buffer_insert_item(
caddr_t bufferp,
__in size_t buffer_size,
__in uint32_t offset,
- __in_bcount(length) caddr_t keyp,
+ __in uint32_t tag,
+ __in_bcount(length) caddr_t valuep,
__in uint32_t length,
- __out uint32_t *lengthp
- );
+ __out uint32_t *lengthp);
+
+extern __checkReturn efx_rc_t
+ef10_nvram_buffer_modify_item(
+ __in_bcount(buffer_size)
+ caddr_t bufferp,
+ __in size_t buffer_size,
+ __in uint32_t offset,
+ __in uint32_t tag,
+ __in_bcount(length) caddr_t valuep,
+ __in uint32_t length,
+ __out uint32_t *lengthp);
extern __checkReturn efx_rc_t
ef10_nvram_buffer_delete_item(
__in size_t buffer_size,
__in uint32_t offset,
__in uint32_t length,
- __in uint32_t end
- );
+ __in uint32_t end);
extern __checkReturn efx_rc_t
ef10_nvram_buffer_finish(
__in_bcount(buffer_size)
caddr_t bufferp,
- __in size_t buffer_size
- );
+ __in size_t buffer_size);
#endif /* EFSYS_OPT_NVRAM */
/* PHY */
typedef struct ef10_link_state_s {
- uint32_t els_adv_cap_mask;
- uint32_t els_lp_cap_mask;
- unsigned int els_fcntl;
- efx_link_mode_t els_link_mode;
+ efx_phy_link_state_t epls;
#if EFSYS_OPT_LOOPBACK
efx_loopback_type_t els_loopback;
#endif
__in efx_nic_t *enp,
__out uint32_t *ouip);
+extern __checkReturn efx_rc_t
+ef10_phy_link_state_get(
+ __in efx_nic_t *enp,
+ __out efx_phy_link_state_t *eplsp);
+
#if EFSYS_OPT_PHY_STATS
extern __checkReturn efx_rc_t
__in unsigned int index,
__in unsigned int label,
__in efsys_mem_t *esmp,
- __in size_t n,
+ __in size_t ndescs,
__in uint32_t id,
__in uint16_t flags,
__in efx_evq_t *eep,
ef10_tx_qdestroy(
__in efx_txq_t *etp);
-extern __checkReturn efx_rc_t
+extern __checkReturn efx_rc_t
ef10_tx_qpost(
- __in efx_txq_t *etp,
- __in_ecount(n) efx_buffer_t *eb,
- __in unsigned int n,
- __in unsigned int completed,
- __inout unsigned int *addedp);
+ __in efx_txq_t *etp,
+ __in_ecount(ndescs) efx_buffer_t *ebp,
+ __in unsigned int ndescs,
+ __in unsigned int completed,
+ __inout unsigned int *addedp);
extern void
ef10_tx_qpush(
#if EFSYS_OPT_RX_PACKED_STREAM
extern void
-ef10_rx_qps_update_credits(
- __in efx_rxq_t *erp);
+ef10_rx_qpush_ps_credits(
+ __in efx_rxq_t *erp);
extern __checkReturn uint8_t *
ef10_rx_qps_packet_info(
ef10_tx_qdesc_tso2_create(
__in efx_txq_t *etp,
__in uint16_t ipv4_id,
+ __in uint16_t outer_ipv4_id,
__in uint32_t tcp_seq,
__in uint16_t tcp_mss,
__out_ecount(count) efx_desc_t *edp,
__in uint16_t vlan_tci,
__out efx_desc_t *edp);
+extern void
+ef10_tx_qdesc_checksum_create(
+ __in efx_txq_t *etp,
+ __in uint16_t flags,
+ __out efx_desc_t *edp);
#if EFSYS_OPT_QSTATS
typedef uint32_t efx_piobuf_handle_t;
-#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
+#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t)-1)
extern __checkReturn efx_rc_t
ef10_nic_pio_alloc(
#if EFSYS_OPT_RX_SCALE
+extern __checkReturn efx_rc_t
+ef10_rx_scale_context_alloc(
+ __in efx_nic_t *enp,
+ __in efx_rx_scale_context_type_t type,
+ __in uint32_t num_queues,
+ __out uint32_t *rss_contextp);
+
+extern __checkReturn efx_rc_t
+ef10_rx_scale_context_free(
+ __in efx_nic_t *enp,
+ __in uint32_t rss_context);
+
extern __checkReturn efx_rc_t
ef10_rx_scale_mode_set(
__in efx_nic_t *enp,
+ __in uint32_t rss_context,
__in efx_rx_hash_alg_t alg,
__in efx_rx_hash_type_t type,
__in boolean_t insert);
extern __checkReturn efx_rc_t
ef10_rx_scale_key_set(
__in efx_nic_t *enp,
+ __in uint32_t rss_context,
__in_ecount(n) uint8_t *key,
__in size_t n);
extern __checkReturn efx_rc_t
ef10_rx_scale_tbl_set(
__in efx_nic_t *enp,
+ __in uint32_t rss_context,
__in_ecount(n) unsigned int *table,
__in size_t n);
__in uint8_t *buffer,
__out uint16_t *lengthp);
-extern void
+extern void
ef10_rx_qpost(
- __in efx_rxq_t *erp,
- __in_ecount(n) efsys_dma_addr_t *addrp,
- __in size_t size,
- __in unsigned int n,
- __in unsigned int completed,
- __in unsigned int added);
+ __in efx_rxq_t *erp,
+ __in_ecount(ndescs) efsys_dma_addr_t *addrp,
+ __in size_t size,
+ __in unsigned int ndescs,
+ __in unsigned int completed,
+ __in unsigned int added);
extern void
ef10_rx_qpush(
ef10_rx_qenable(
__in efx_rxq_t *erp);
+union efx_rxq_type_data_u;
+
extern __checkReturn efx_rc_t
ef10_rx_qcreate(
__in efx_nic_t *enp,
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
+ __in_opt const union efx_rxq_type_data_u *type_data,
__in efsys_mem_t *esmp,
- __in size_t n,
+ __in size_t ndescs,
__in uint32_t id,
+ __in unsigned int flags,
__in efx_evq_t *eep,
__in efx_rxq_t *erp);
/* Allow for the broadcast address to be added to the multicast list */
#define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
+/*
+ * For encapsulated packets, there is one filter each for each combination of
+ * IPv4 or IPv6 outer frame, VXLAN, GENEVE or NVGRE packet type, and unicast or
+ * multicast inner frames.
+ */
+#define EFX_EF10_FILTER_ENCAP_FILTERS_MAX 12
+
typedef struct ef10_filter_table_s {
ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
efx_rxq_t *eft_default_rxq;
EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
uint32_t eft_mulcst_filter_count;
boolean_t eft_using_all_mulcst;
+ uint32_t eft_encap_filter_indexes[
+ EFX_EF10_FILTER_ENCAP_FILTERS_MAX];
+ uint32_t eft_encap_filter_count;
} ef10_filter_table_t;
__checkReturn efx_rc_t
extern __checkReturn efx_rc_t
ef10_filter_supported_filters(
- __in efx_nic_t *enp,
- __out uint32_t *list,
- __out size_t *length);
+ __in efx_nic_t *enp,
+ __out_ecount(buffer_length) uint32_t *buffer,
+ __in size_t buffer_length,
+ __out size_t *list_lengthp);
extern __checkReturn efx_rc_t
ef10_filter_reconfigure(
efx_mcdi_get_port_modes(
__in efx_nic_t *enp,
__out uint32_t *modesp,
- __out_opt uint32_t *current_modep);
+ __out_opt uint32_t *current_modep,
+ __out_opt uint32_t *default_modep);
extern __checkReturn efx_rc_t
ef10_nic_get_port_mode_bandwidth(
- __in uint32_t port_mode,
+ __in efx_nic_t *enp,
__out uint32_t *bandwidth_mbpsp);
extern __checkReturn efx_rc_t
__out uint32_t *dpcpu_freqp);
+extern __checkReturn efx_rc_t
+efx_mcdi_get_rxdp_config(
+ __in efx_nic_t *enp,
+ __out uint32_t *end_paddingp);
+
extern __checkReturn efx_rc_t
efx_mcdi_get_vector_cfg(
__in efx_nic_t *enp,
__out_opt uint32_t *pf_nvecp,
__out_opt uint32_t *vf_nvecp);
+extern __checkReturn efx_rc_t
+ef10_get_privilege_mask(
+ __in efx_nic_t *enp,
+ __out uint32_t *maskp);
+
+#if EFSYS_OPT_FW_SUBVARIANT_AWARE
+
extern __checkReturn efx_rc_t
-ef10_get_datapath_caps(
+efx_mcdi_get_nic_global(
+ __in efx_nic_t *enp,
+ __in uint32_t key,
+ __out uint32_t *valuep);
+
+extern __checkReturn efx_rc_t
+efx_mcdi_set_nic_global(
+ __in efx_nic_t *enp,
+ __in uint32_t key,
+ __in uint32_t value);
+
+#endif /* EFSYS_OPT_FW_SUBVARIANT_AWARE */
+
+#if EFSYS_OPT_EVB
+extern __checkReturn efx_rc_t
+ef10_evb_init(
+ __in efx_nic_t *enp);
+
+extern void
+ef10_evb_fini(
+ __in efx_nic_t *enp);
+
+extern __checkReturn efx_rc_t
+ef10_evb_vswitch_alloc(
+ __in efx_nic_t *enp,
+ __out efx_vswitch_id_t *vswitch_idp);
+
+
+extern __checkReturn efx_rc_t
+ef10_evb_vswitch_free(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id);
+
+extern __checkReturn efx_rc_t
+ef10_evb_vport_alloc(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id,
+ __in efx_vport_type_t vport_type,
+ __in uint16_t vid,
+ __in boolean_t vlan_restrict,
+ __out efx_vport_id_t *vport_idp);
+
+
+extern __checkReturn efx_rc_t
+ef10_evb_vport_free(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id,
+ __in efx_vport_id_t vport_id);
+
+extern __checkReturn efx_rc_t
+ef10_evb_vport_mac_addr_add(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id,
+ __in efx_vport_id_t vport_id,
+ __in_ecount(6) uint8_t *addrp);
+
+extern __checkReturn efx_rc_t
+ef10_evb_vport_mac_addr_del(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id,
+ __in efx_vport_id_t vport_id,
+ __in_ecount(6) uint8_t *addrp);
+
+extern __checkReturn efx_rc_t
+ef10_evb_vadaptor_alloc(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id,
+ __in efx_vport_id_t vport_id);
+
+
+extern __checkReturn efx_rc_t
+ef10_evb_vadaptor_free(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id,
+ __in efx_vport_id_t vport_id);
+
+extern __checkReturn efx_rc_t
+ef10_evb_vport_assign(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id,
+ __in efx_vport_id_t vport_id,
+ __in uint32_t vf_index);
+
+extern __checkReturn efx_rc_t
+ef10_evb_vport_reconfigure(
+ __in efx_nic_t *enp,
+ __in efx_vswitch_id_t vswitch_id,
+ __in efx_vport_id_t vport_id,
+ __in_opt uint16_t *vidp,
+ __in_bcount_opt(EFX_MAC_ADDR_LEN) uint8_t *addrp,
+ __out_opt boolean_t *fn_resetp);
+
+#endif /* EFSYS_OPT_EVB */
+
+#if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
+extern __checkReturn efx_rc_t
+ef10_proxy_auth_init(
+ __in efx_nic_t *enp);
+
+extern void
+ef10_proxy_auth_fini(
__in efx_nic_t *enp);
extern __checkReturn efx_rc_t
-ef10_get_privilege_mask(
+ef10_proxy_auth_mc_config(
__in efx_nic_t *enp,
- __out uint32_t *maskp);
+ __in efsys_mem_t *request_bufferp,
+ __in efsys_mem_t *response_bufferp,
+ __in efsys_mem_t *status_bufferp,
+ __in uint32_t block_cnt,
+ __in_ecount(op_count) uint32_t *op_listp,
+ __in size_t op_count);
+
+extern __checkReturn efx_rc_t
+ef10_proxy_auth_disable(
+ __in efx_nic_t *enp);
extern __checkReturn efx_rc_t
-ef10_external_port_mapping(
+ef10_proxy_auth_privilege_modify(
+ __in efx_nic_t *enp,
+ __in uint32_t fn_group,
+ __in uint32_t pf_index,
+ __in uint32_t vf_index,
+ __in uint32_t add_privileges_mask,
+ __in uint32_t remove_privileges_mask);
+
+ __checkReturn efx_rc_t
+ef10_proxy_auth_set_privilege_mask(
+ __in efx_nic_t *enp,
+ __in uint32_t vf_index,
+ __in uint32_t mask,
+ __in uint32_t value);
+
+ __checkReturn efx_rc_t
+ef10_proxy_auth_complete_request(
__in efx_nic_t *enp,
- __in uint32_t port,
- __out uint8_t *external_portp);
+ __in uint32_t fn_index,
+ __in uint32_t proxy_result,
+ __in uint32_t handle);
+
+ __checkReturn efx_rc_t
+ef10_proxy_auth_exec_cmd(
+ __in efx_nic_t *enp,
+ __inout efx_proxy_cmd_params_t *paramsp);
+
+#endif /* EFSYS_OPT_MCDI_PROXY_AUTH_SERVER */
#if EFSYS_OPT_RX_PACKED_STREAM
/* Minimum space for packet in packed stream mode */
#define EFX_RX_PACKED_STREAM_MIN_PACKET_SPACE \
P2ROUNDUP(EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE + \
- EFX_MAC_PDU_MIN + \
- EFX_RX_PACKED_STREAM_ALIGNMENT, \
- EFX_RX_PACKED_STREAM_ALIGNMENT)
+ EFX_MAC_PDU_MIN + \
+ EFX_RX_PACKED_STREAM_ALIGNMENT, \
+ EFX_RX_PACKED_STREAM_ALIGNMENT)
/* Maximum number of credits */
#define EFX_RX_PACKED_STREAM_MAX_CREDITS 127
#endif /* EFSYS_OPT_RX_PACKED_STREAM */
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
+
+/*
+ * Maximum DMA length and buffer stride alignment.
+ * (see SF-119419-TC, 3.2)
+ */
+#define EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT 64
+
+#endif
+
#ifdef __cplusplus
}
#endif
git.droids-corp.org / dpdk.git / blobdiff