app/procinfo: add --show-mempool

[dpdk.git] / drivers / net / sfc / base / ef10_nic.c

diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 1eea7c6..50e23b7 100644 (file)
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -128,16 +128,41 @@ fail1:
 
        __checkReturn   efx_rc_t
 ef10_nic_get_port_mode_bandwidth(
-       __in            uint32_t port_mode,
+       __in            efx_nic_t *enp,
        __out           uint32_t *bandwidth_mbpsp)
 {
-       uint32_t single_lane = 10000;
-       uint32_t dual_lane   = 50000;
-       uint32_t quad_lane   = 40000;
+       uint32_t port_modes;
+       uint32_t current_mode;
+       efx_port_t *epp = &(enp->en_port);
+
+       uint32_t single_lane;
+       uint32_t dual_lane;
+       uint32_t quad_lane;
        uint32_t bandwidth;
        efx_rc_t rc;
 
-       switch (port_mode) {
+       if ((rc = efx_mcdi_get_port_modes(enp, &port_modes,
+                                   &current_mode, NULL)) != 0) {
+               /* No port mode info available. */
+               goto fail1;
+       }
+
+       if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_25000FDX))
+               single_lane = 25000;
+       else
+               single_lane = 10000;
+
+       if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_50000FDX))
+               dual_lane = 50000;
+       else
+               dual_lane = 20000;
+
+       if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_100000FDX))
+               quad_lane = 100000;
+       else
+               quad_lane = 40000;
+
+       switch (current_mode) {
        case TLV_PORT_MODE_1x1_NA:                      /* mode 0 */
                bandwidth = single_lane;
                break;
@@ -187,13 +212,15 @@ ef10_nic_get_port_mode_bandwidth(
                break;
        default:
                rc = EINVAL;
-               goto fail1;
+               goto fail2;
        }
 
        *bandwidth_mbpsp = bandwidth;
 
        return (0);
 
+fail2:
+       EFSYS_PROBE(fail2);
 fail1:
        EFSYS_PROBE1(fail1, efx_rc_t, rc);
 
@@ -1059,11 +1086,13 @@ ef10_get_datapath_caps(
        }
        encp->enc_rx_prefix_size = 14;
 
+#if EFSYS_OPT_RX_SCALE
        /* Check if the firmware supports additional RSS modes */
        if (CAP_FLAGS1(req, ADDITIONAL_RSS_MODES))
                encp->enc_rx_scale_additional_modes_supported = B_TRUE;
        else
                encp->enc_rx_scale_additional_modes_supported = B_FALSE;
+#endif /* EFSYS_OPT_RX_SCALE */
 
        /* Check if the firmware supports TSO */
        if (CAP_FLAGS1(req, TX_TSO))
@@ -1269,6 +1298,7 @@ ef10_get_datapath_caps(
        else
                encp->enc_hlb_counters = B_FALSE;
 
+#if EFSYS_OPT_RX_SCALE
        if (CAP_FLAGS1(req, RX_RSS_LIMITED)) {
                /* Only one exclusive RSS context is available per port. */
                encp->enc_rx_scale_max_exclusive_contexts = 1;
@@ -1318,6 +1348,8 @@ ef10_get_datapath_caps(
                 */
                encp->enc_rx_scale_l4_hash_supported = B_TRUE;
        }
+#endif /* EFSYS_OPT_RX_SCALE */
+
        /* Check if the firmware supports "FLAG" and "MARK" filter actions */
        if (CAP_FLAGS2(req, FILTER_ACTION_FLAG))
                encp->enc_filter_action_flag_supported = B_TRUE;
@@ -1341,8 +1373,10 @@ ef10_get_datapath_caps(
 
        return (0);
 
+#if EFSYS_OPT_RX_SCALE
 fail5:
        EFSYS_PROBE(fail5);
+#endif /* EFSYS_OPT_RX_SCALE */
 fail4:
        EFSYS_PROBE(fail4);
 fail3:
@@ -1818,8 +1852,8 @@ ef10_nic_board_cfg(
        /* Obtain the default PHY advertised capabilities */
        if ((rc = ef10_phy_get_link(enp, &els)) != 0)
                goto fail7;
-       epp->ep_default_adv_cap_mask = els.els_adv_cap_mask;
-       epp->ep_adv_cap_mask = els.els_adv_cap_mask;
+       epp->ep_default_adv_cap_mask = els.epls.epls_adv_cap_mask;
+       epp->ep_adv_cap_mask = els.epls.epls_adv_cap_mask;
 
        /* Check capabilities of running datapath firmware */
        if ((rc = ef10_get_datapath_caps(enp)) != 0)