net/sfc/base: fix name of the argument to store RSS flags
[dpdk.git] / drivers / net / sfc / base / ef10_rx.c
index 86a6ac7..17678b5 100644 (file)
@@ -21,12 +21,16 @@ efx_mcdi_init_rxq(
        __in            efsys_mem_t *esmp,
        __in            boolean_t disable_scatter,
        __in            boolean_t want_inner_classes,
-       __in            uint32_t ps_bufsize)
+       __in            uint32_t ps_bufsize,
+       __in            uint32_t es_bufs_per_desc,
+       __in            uint32_t es_max_dma_len,
+       __in            uint32_t es_buf_stride,
+       __in            uint32_t hol_block_timeout)
 {
        efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
-                           MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V3_IN_LEN,
+               MC_CMD_INIT_RXQ_V3_OUT_LEN);
        int npages = EFX_RXQ_NBUFS(ndescs);
        int i;
        efx_qword_t *dma_addr;
@@ -44,6 +48,8 @@ efx_mcdi_init_rxq(
 
        if (ps_bufsize > 0)
                dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
+       else if (es_bufs_per_desc > 0)
+               dma_mode = MC_CMD_INIT_RXQ_V3_IN_EQUAL_STRIDE_SUPER_BUFFER;
        else
                dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
 
@@ -67,12 +73,11 @@ efx_mcdi_init_rxq(
                want_outer_classes = B_FALSE;
        }
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_INIT_RXQ;
        req.emr_in_buf = payload;
-       req.emr_in_length = MC_CMD_INIT_RXQ_EXT_IN_LEN;
+       req.emr_in_length = MC_CMD_INIT_RXQ_V3_IN_LEN;
        req.emr_out_buf = payload;
-       req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
+       req.emr_out_length = MC_CMD_INIT_RXQ_V3_OUT_LEN;
 
        MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
        MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
@@ -92,6 +97,19 @@ efx_mcdi_init_rxq(
        MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
        MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
 
+       if (es_bufs_per_desc > 0) {
+               MCDI_IN_SET_DWORD(req,
+                   INIT_RXQ_V3_IN_ES_PACKET_BUFFERS_PER_BUCKET,
+                   es_bufs_per_desc);
+               MCDI_IN_SET_DWORD(req,
+                   INIT_RXQ_V3_IN_ES_MAX_DMA_LEN, es_max_dma_len);
+               MCDI_IN_SET_DWORD(req,
+                   INIT_RXQ_V3_IN_ES_PACKET_STRIDE, es_buf_stride);
+               MCDI_IN_SET_DWORD(req,
+                   INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT,
+                   hol_block_timeout);
+       }
+
        dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
        addr = EFSYS_MEM_ADDR(esmp);
 
@@ -127,11 +145,10 @@ efx_mcdi_fini_rxq(
        __in            uint32_t instance)
 {
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_FINI_RXQ_IN_LEN,
-                           MC_CMD_FINI_RXQ_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_RXQ_IN_LEN,
+               MC_CMD_FINI_RXQ_OUT_LEN);
        efx_rc_t rc;
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_FINI_RXQ;
        req.emr_in_buf = payload;
        req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
@@ -169,8 +186,8 @@ efx_mcdi_rss_context_alloc(
        __out           uint32_t *rss_contextp)
 {
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN,
-                           MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN,
+               MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN);
        uint32_t rss_context;
        uint32_t context_type;
        efx_rc_t rc;
@@ -192,7 +209,6 @@ efx_mcdi_rss_context_alloc(
                goto fail2;
        }
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_RSS_CONTEXT_ALLOC;
        req.emr_in_buf = payload;
        req.emr_in_length = MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN;
@@ -255,8 +271,8 @@ efx_mcdi_rss_context_free(
        __in            uint32_t rss_context)
 {
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_FREE_IN_LEN,
-                           MC_CMD_RSS_CONTEXT_FREE_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_FREE_IN_LEN,
+               MC_CMD_RSS_CONTEXT_FREE_OUT_LEN);
        efx_rc_t rc;
 
        if (rss_context == EF10_RSS_CONTEXT_INVALID) {
@@ -264,7 +280,6 @@ efx_mcdi_rss_context_free(
                goto fail1;
        }
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_RSS_CONTEXT_FREE;
        req.emr_in_buf = payload;
        req.emr_in_length = MC_CMD_RSS_CONTEXT_FREE_IN_LEN;
@@ -298,17 +313,39 @@ efx_mcdi_rss_context_set_flags(
        __in            uint32_t rss_context,
        __in            efx_rx_hash_type_t type)
 {
+       efx_nic_cfg_t *encp = &enp->en_nic_cfg;
+       efx_rx_hash_type_t type_ipv4;
+       efx_rx_hash_type_t type_ipv4_tcp;
+       efx_rx_hash_type_t type_ipv6;
+       efx_rx_hash_type_t type_ipv6_tcp;
+       efx_rx_hash_type_t modes;
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
-                           MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
+               MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN);
        efx_rc_t rc;
 
+       EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_TCP_LBN ==
+                   MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_LBN);
+       EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_TCP_WIDTH ==
+                   MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_WIDTH);
+       EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_LBN ==
+                   MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_LBN);
+       EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_WIDTH ==
+                   MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_WIDTH);
+       EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_TCP_LBN ==
+                   MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_LBN);
+       EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_TCP_WIDTH ==
+                   MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_WIDTH);
+       EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_LBN ==
+                   MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_LBN);
+       EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_WIDTH ==
+                   MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_WIDTH);
+
        if (rss_context == EF10_RSS_CONTEXT_INVALID) {
                rc = EINVAL;
                goto fail1;
        }
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_FLAGS;
        req.emr_in_buf = payload;
        req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN;
@@ -318,15 +355,57 @@ efx_mcdi_rss_context_set_flags(
        MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
            rss_context);
 
-       MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
+       type_ipv4 = EFX_RX_HASH(IPV4, 2TUPLE) | EFX_RX_HASH(IPV4_TCP, 2TUPLE) |
+                   EFX_RX_HASH(IPV4_UDP, 2TUPLE);
+       type_ipv4_tcp = EFX_RX_HASH(IPV4_TCP, 4TUPLE);
+       type_ipv6 = EFX_RX_HASH(IPV6, 2TUPLE) | EFX_RX_HASH(IPV6_TCP, 2TUPLE) |
+                   EFX_RX_HASH(IPV6_UDP, 2TUPLE);
+       type_ipv6_tcp = EFX_RX_HASH(IPV6_TCP, 4TUPLE);
+
+       /*
+        * Create a copy of the original hash type.
+        * The copy will be used to fill in RSS_MODE bits and
+        * may be cleared beforehand. The original variable
+        * and, thus, EN bits will remain unaffected.
+        */
+       modes = type;
+
+       /*
+        * If the firmware lacks support for additional modes, RSS_MODE
+        * fields must contain zeros, otherwise the operation will fail.
+        */
+       if (encp->enc_rx_scale_additional_modes_supported == B_FALSE)
+               modes = 0;
+
+#define        EXTRACT_RSS_MODE(_type, _class)         \
+       (EFX_EXTRACT_NATIVE(_type, 0, 31,       \
+       EFX_LOW_BIT(EFX_RX_CLASS_##_class),     \
+       EFX_HIGH_BIT(EFX_RX_CLASS_##_class)) &  \
+       EFX_MASK32(EFX_RX_CLASS_##_class))
+
+       MCDI_IN_POPULATE_DWORD_10(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
            RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
-           (type & EFX_RX_HASH_IPV4) ? 1 : 0,
+           ((type & type_ipv4) == type_ipv4) ? 1 : 0,
            RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
-           (type & EFX_RX_HASH_TCPIPV4) ? 1 : 0,
+           ((type & type_ipv4_tcp) == type_ipv4_tcp) ? 1 : 0,
            RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
-           (type & EFX_RX_HASH_IPV6) ? 1 : 0,
+           ((type & type_ipv6) == type_ipv6) ? 1 : 0,
            RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
-           (type & EFX_RX_HASH_TCPIPV6) ? 1 : 0);
+           ((type & type_ipv6_tcp) == type_ipv6_tcp) ? 1 : 0,
+           RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE,
+           EXTRACT_RSS_MODE(modes, IPV4_TCP),
+           RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE,
+           EXTRACT_RSS_MODE(modes, IPV4_UDP),
+           RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE,
+           EXTRACT_RSS_MODE(modes, IPV4),
+           RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE,
+           EXTRACT_RSS_MODE(modes, IPV6_TCP),
+           RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE,
+           EXTRACT_RSS_MODE(modes, IPV6_UDP),
+           RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE,
+           EXTRACT_RSS_MODE(modes, IPV6));
+
+#undef EXTRACT_RSS_MODE
 
        efx_mcdi_execute(enp, &req);
 
@@ -355,8 +434,8 @@ efx_mcdi_rss_context_set_key(
        __in            size_t n)
 {
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN,
-                           MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN,
+               MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN);
        efx_rc_t rc;
 
        if (rss_context == EF10_RSS_CONTEXT_INVALID) {
@@ -364,7 +443,6 @@ efx_mcdi_rss_context_set_key(
                goto fail1;
        }
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_KEY;
        req.emr_in_buf = payload;
        req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN;
@@ -412,8 +490,8 @@ efx_mcdi_rss_context_set_table(
        __in            size_t n)
 {
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN,
-                           MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN,
+               MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN);
        uint8_t *req_table;
        int i, rc;
 
@@ -422,7 +500,6 @@ efx_mcdi_rss_context_set_table(
                goto fail1;
        }
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_TABLE;
        req.emr_in_buf = payload;
        req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN;
@@ -551,12 +628,13 @@ ef10_rx_scale_mode_set(
        __in            efx_rx_hash_type_t type,
        __in            boolean_t insert)
 {
+       efx_nic_cfg_t *encp = &enp->en_nic_cfg;
        efx_rc_t rc;
 
-       EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ);
        EFSYS_ASSERT3U(insert, ==, B_TRUE);
 
-       if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) {
+       if ((encp->enc_rx_scale_hash_alg_mask & (1U << alg)) == 0 ||
+           insert == B_FALSE) {
                rc = EINVAL;
                goto fail1;
        }
@@ -705,6 +783,7 @@ ef10_rx_prefix_hash(
        _NOTE(ARGUNUSED(enp))
 
        switch (func) {
+       case EFX_RX_HASHALG_PACKED_STREAM:
        case EFX_RX_HASHALG_TOEPLITZ:
                return (buffer[0] |
                    (buffer[1] << 8) |
@@ -933,7 +1012,7 @@ ef10_rx_qcreate(
        __in            unsigned int index,
        __in            unsigned int label,
        __in            efx_rxq_type_t type,
-       __in            uint32_t type_data,
+       __in            const efx_rxq_type_data_t *type_data,
        __in            efsys_mem_t *esmp,
        __in            size_t ndescs,
        __in            uint32_t id,
@@ -946,6 +1025,10 @@ ef10_rx_qcreate(
        boolean_t disable_scatter;
        boolean_t want_inner_classes;
        unsigned int ps_buf_size;
+       uint32_t es_bufs_per_desc = 0;
+       uint32_t es_max_dma_len = 0;
+       uint32_t es_buf_stride = 0;
+       uint32_t hol_block_timeout = 0;
 
        _NOTE(ARGUNUSED(id, erp, type_data))
 
@@ -972,7 +1055,7 @@ ef10_rx_qcreate(
                break;
 #if EFSYS_OPT_RX_PACKED_STREAM
        case EFX_RXQ_TYPE_PACKED_STREAM:
-               switch (type_data) {
+               switch (type_data->ertd_packed_stream.eps_buf_size) {
                case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M:
                        ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
                        break;
@@ -994,6 +1077,19 @@ ef10_rx_qcreate(
                }
                break;
 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
+       case EFX_RXQ_TYPE_ES_SUPER_BUFFER:
+               ps_buf_size = 0;
+               es_bufs_per_desc =
+                   type_data->ertd_es_super_buffer.eessb_bufs_per_desc;
+               es_max_dma_len =
+                   type_data->ertd_es_super_buffer.eessb_max_dma_len;
+               es_buf_stride =
+                   type_data->ertd_es_super_buffer.eessb_buf_stride;
+               hol_block_timeout =
+                   type_data->ertd_es_super_buffer.eessb_hol_block_timeout;
+               break;
+#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
        default:
                rc = ENOTSUP;
                goto fail4;
@@ -1017,6 +1113,27 @@ ef10_rx_qcreate(
        EFSYS_ASSERT(ps_buf_size == 0);
 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
 
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
+       if (es_bufs_per_desc > 0) {
+               if (encp->enc_rx_es_super_buffer_supported == B_FALSE) {
+                       rc = ENOTSUP;
+                       goto fail7;
+               }
+               if (!IS_P2ALIGNED(es_max_dma_len,
+                           EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
+                       rc = EINVAL;
+                       goto fail8;
+               }
+               if (!IS_P2ALIGNED(es_buf_stride,
+                           EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) {
+                       rc = EINVAL;
+                       goto fail9;
+               }
+       }
+#else /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
+       EFSYS_ASSERT(es_bufs_per_desc == 0);
+#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
+
        /* Scatter can only be disabled if the firmware supports doing so */
        if (flags & EFX_RXQ_FLAG_SCATTER)
                disable_scatter = B_FALSE;
@@ -1030,8 +1147,9 @@ ef10_rx_qcreate(
 
        if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep->ee_index, label, index,
                    esmp, disable_scatter, want_inner_classes,
-                   ps_buf_size)) != 0)
-               goto fail7;
+                   ps_buf_size, es_bufs_per_desc, es_max_dma_len,
+                   es_buf_stride, hol_block_timeout)) != 0)
+               goto fail10;
 
        erp->er_eep = eep;
        erp->er_label = label;
@@ -1042,8 +1160,16 @@ ef10_rx_qcreate(
 
        return (0);
 
+fail10:
+       EFSYS_PROBE(fail10);
+#if EFSYS_OPT_RX_ES_SUPER_BUFFER
+fail9:
+       EFSYS_PROBE(fail9);
+fail8:
+       EFSYS_PROBE(fail8);
 fail7:
        EFSYS_PROBE(fail7);
+#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */
 #if EFSYS_OPT_RX_PACKED_STREAM
 fail6:
        EFSYS_PROBE(fail6);