net/bnxt: add TruFlow core identifier

[dpdk.git] / drivers / net / sfc / base / ef10_tx.c

diff --git a/drivers/net/sfc/base/ef10_tx.c b/drivers/net/sfc/base/ef10_tx.c
index 8ca0b55..e2f9eba 100644 (file)
--- a/drivers/net/sfc/base/ef10_tx.c
+++ b/drivers/net/sfc/base/ef10_tx.c
@@ -1,14 +1,14 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- * Copyright (c) 2012-2018 Solarflare Communications Inc.
- * All rights reserved.
+ * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2012-2019 Solarflare Communications Inc.
  */
 
 #include "efx.h"
 #include "efx_impl.h"
 
 
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
 
 #if EFSYS_OPT_QSTATS
 #define        EFX_TX_QSTAT_INCR(_etp, _stat)                                  \
@@ -31,29 +31,30 @@ efx_mcdi_init_txq(
        __in            efsys_mem_t *esmp)
 {
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_INIT_TXQ_IN_LEN(EFX_TXQ_MAX_BUFS),
-                           MC_CMD_INIT_TXQ_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload,
+               MC_CMD_INIT_TXQ_IN_LEN(EF10_TXQ_MAXNBUFS),
+               MC_CMD_INIT_TXQ_OUT_LEN);
        efx_qword_t *dma_addr;
        uint64_t addr;
        int npages;
        int i;
        efx_rc_t rc;
 
-       EFSYS_ASSERT(EFX_TXQ_MAX_BUFS >=
-           EFX_TXQ_NBUFS(enp->en_nic_cfg.enc_txq_max_ndescs));
+       EFSYS_ASSERT(EF10_TXQ_MAXNBUFS >=
+           efx_txq_nbufs(enp, enp->en_nic_cfg.enc_txq_max_ndescs));
 
-       if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_TXQ_SIZE(ndescs))) {
+       if ((esmp == NULL) ||
+           (EFSYS_MEM_SIZE(esmp) < efx_txq_size(enp, ndescs))) {
                rc = EINVAL;
                goto fail1;
        }
 
-       npages = EFX_TXQ_NBUFS(ndescs);
+       npages = efx_txq_nbufs(enp, ndescs);
        if (MC_CMD_INIT_TXQ_IN_LEN(npages) > sizeof (payload)) {
                rc = EINVAL;
                goto fail2;
        }
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_INIT_TXQ;
        req.emr_in_buf = payload;
        req.emr_in_length = MC_CMD_INIT_TXQ_IN_LEN(npages);
@@ -81,7 +82,7 @@ efx_mcdi_init_txq(
            INIT_TXQ_IN_FLAG_TIMESTAMP, 0);
 
        MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_OWNER_ID, 0);
-       MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
+       MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_PORT_ID, enp->en_vport_id);
 
        dma_addr = MCDI_IN2(req, efx_qword_t, INIT_TXQ_IN_DMA_ADDR);
        addr = EFSYS_MEM_ADDR(esmp);
@@ -120,11 +121,10 @@ efx_mcdi_fini_txq(
        __in            uint32_t instance)
 {
        efx_mcdi_req_t req;
-       uint8_t payload[MAX(MC_CMD_FINI_TXQ_IN_LEN,
-                           MC_CMD_FINI_TXQ_OUT_LEN)];
+       EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_TXQ_IN_LEN,
+               MC_CMD_FINI_TXQ_OUT_LEN);
        efx_rc_t rc;
 
-       (void) memset(payload, 0, sizeof (payload));
        req.emr_cmd = MC_CMD_FINI_TXQ;
        req.emr_in_buf = payload;
        req.emr_in_length = MC_CMD_FINI_TXQ_IN_LEN;
@@ -278,7 +278,7 @@ ef10_tx_qpio_enable(
 
 fail3:
        EFSYS_PROBE(fail3);
-       ef10_nic_pio_free(enp, etp->et_pio_bufnum, etp->et_pio_blknum);
+       (void) ef10_nic_pio_free(enp, etp->et_pio_bufnum, etp->et_pio_blknum);
 fail2:
        EFSYS_PROBE(fail2);
        etp->et_pio_size = 0;
@@ -296,10 +296,12 @@ ef10_tx_qpio_disable(
 
        if (etp->et_pio_size != 0) {
                /* Unlink the piobuf from this TXQ */
-               ef10_nic_pio_unlink(enp, etp->et_index);
+               if (ef10_nic_pio_unlink(enp, etp->et_index) != 0)
+                       return;
 
                /* Free the sub-allocated PIO block */
-               ef10_nic_pio_free(enp, etp->et_pio_bufnum, etp->et_pio_blknum);
+               (void) ef10_nic_pio_free(enp, etp->et_pio_bufnum,
+                   etp->et_pio_blknum);
                etp->et_pio_size = 0;
                etp->et_pio_write_offset = 0;
        }
@@ -539,12 +541,9 @@ ef10_tx_qdesc_post(
 {
        unsigned int added = *addedp;
        unsigned int i;
-       efx_rc_t rc;
 
-       if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
-               rc = ENOSPC;
-               goto fail1;
-       }
+       if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1))
+               return (ENOSPC);
 
        for (i = 0; i < ndescs; i++) {
                efx_desc_t *edp = &ed[i];
@@ -564,11 +563,6 @@ ef10_tx_qdesc_post(
 
        *addedp = added;
        return (0);
-
-fail1:
-       EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-       return (rc);
 }
 
        void
@@ -623,6 +617,7 @@ ef10_tx_qdesc_tso_create(
 ef10_tx_qdesc_tso2_create(
        __in                    efx_txq_t *etp,
        __in                    uint16_t ipv4_id,
+       __in                    uint16_t outer_ipv4_id,
        __in                    uint32_t tcp_seq,
        __in                    uint16_t tcp_mss,
        __out_ecount(count)     efx_desc_t *edp,
@@ -644,13 +639,14 @@ ef10_tx_qdesc_tso2_create(
                            ESE_DZ_TX_TSO_OPTION_DESC_FATSO2A,
                            ESF_DZ_TX_TSO_IP_ID, ipv4_id,
                            ESF_DZ_TX_TSO_TCP_SEQNO, tcp_seq);
-       EFX_POPULATE_QWORD_4(edp[1].ed_eq,
+       EFX_POPULATE_QWORD_5(edp[1].ed_eq,
                            ESF_DZ_TX_DESC_IS_OPT, 1,
                            ESF_DZ_TX_OPTION_TYPE,
                            ESE_DZ_TX_OPTION_DESC_TSO,
                            ESF_DZ_TX_TSO_OPTION_TYPE,
                            ESE_DZ_TX_TSO_OPTION_DESC_FATSO2B,
-                           ESF_DZ_TX_TSO_TCP_MSS, tcp_mss);
+                           ESF_DZ_TX_TSO_TCP_MSS, tcp_mss,
+                           ESF_DZ_TX_TSO_OUTER_IPID, outer_ipv4_id);
 }
 
        void
@@ -773,4 +769,4 @@ ef10_tx_qstats_update(
 
 #endif /* EFSYS_OPT_QSTATS */
 
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */