net/avf: fix Tx offload mask

[dpdk.git] / drivers / net / sfc / base / efx.h

diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index de62b7d..2e847b6 100644 (file)
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1030,12 +1030,39 @@ efx_phy_media_type_get(
        __in            efx_nic_t *enp,
        __out           efx_phy_media_type_t *typep);
 
+/*
+ * 2-wire device address of the base information in accordance with SFF-8472
+ * Diagnostic Monitoring Interface for Optical Transceivers section
+ * 4 Memory Organization.
+ */
+#define        EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE    0xA0
+
+/*
+ * 2-wire device address of the digital diagnostics monitoring interface
+ * in accordance with SFF-8472 Diagnostic Monitoring Interface for Optical
+ * Transceivers section 4 Memory Organization.
+ */
+#define        EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM     0xA2
+
+/*
+ * Hard wired 2-wire device address for QSFP+ in accordance with SFF-8436
+ * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER section 7.4 Device Addressing and
+ * Operation.
+ */
+#define        EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP        0xA0
+
+/*
+ * Maximum accessible data offset for PHY module information.
+ */
+#define        EFX_PHY_MEDIA_INFO_MAX_OFFSET           0x100
+
+
 extern __checkReturn           efx_rc_t
 efx_phy_module_get_info(
        __in                    efx_nic_t *enp,
        __in                    uint8_t dev_addr,
-       __in                    uint8_t offset,
-       __in                    uint8_t len,
+       __in                    size_t offset,
+       __in                    size_t len,
        __out_bcount(len)       uint8_t *data);
 
 #if EFSYS_OPT_PHY_STATS
@@ -1254,6 +1281,7 @@ typedef struct efx_nic_cfg_s {
        uint32_t                enc_rx_prefix_size;
        uint32_t                enc_rx_buf_align_start;
        uint32_t                enc_rx_buf_align_end;
+#if EFSYS_OPT_RX_SCALE
        uint32_t                enc_rx_scale_max_exclusive_contexts;
        /*
         * Mask of supported hash algorithms.
@@ -1266,6 +1294,7 @@ typedef struct efx_nic_cfg_s {
         */
        boolean_t               enc_rx_scale_l4_hash_supported;
        boolean_t               enc_rx_scale_additional_modes_supported;
+#endif /* EFSYS_OPT_RX_SCALE */
 #if EFSYS_OPT_LOOPBACK
        efx_qword_t             enc_loopback_types[EFX_LINK_NMODES];
 #endif /* EFSYS_OPT_LOOPBACK */
@@ -2267,7 +2296,7 @@ typedef enum efx_rx_hash_alg_e {
  *  - a combination of legacy flags
  *  - a combination of EFX_RX_HASH() flags
  */
-typedef unsigned int efx_rx_hash_type_t;
+typedef uint32_t efx_rx_hash_type_t;
 
 typedef enum efx_rx_hash_support_e {
        EFX_RX_HASH_UNAVAILABLE = 0,    /* Hardware hash not inserted */
@@ -2849,6 +2878,8 @@ typedef struct efx_filter_spec_s {
        efx_filter_flags_t              efs_flags;
        uint16_t                        efs_dmaq_id;
        uint32_t                        efs_rss_context;
+       uint32_t                        efs_mark;
+       /* Fields below here are hashed for software filter lookup */
        uint16_t                        efs_outer_vid;
        uint16_t                        efs_inner_vid;
        uint8_t                         efs_loc_mac[EFX_MAC_ADDR_LEN];
@@ -2862,7 +2893,6 @@ typedef struct efx_filter_spec_s {
        efx_oword_t                     efs_loc_host;
        uint8_t                         efs_vni_or_vsid[EFX_VNI_OR_VSID_LEN];
        uint8_t                         efs_ifrm_loc_mac[EFX_MAC_ADDR_LEN];
-       uint32_t                        efs_mark;
 } efx_filter_spec_t;
 
 
@@ -2959,9 +2989,23 @@ efx_filter_spec_set_encap_type(
        __in            efx_filter_inner_frame_match_t inner_frame_match);
 
 extern __checkReturn   efx_rc_t
-efx_filter_spec_set_vxlan_full(
+efx_filter_spec_set_vxlan(
        __inout         efx_filter_spec_t *spec,
-       __in            const uint8_t *vxlan_id,
+       __in            const uint8_t *vni,
+       __in            const uint8_t *inner_addr,
+       __in            const uint8_t *outer_addr);
+
+extern __checkReturn   efx_rc_t
+efx_filter_spec_set_geneve(
+       __inout         efx_filter_spec_t *spec,
+       __in            const uint8_t *vni,
+       __in            const uint8_t *inner_addr,
+       __in            const uint8_t *outer_addr);
+
+extern __checkReturn   efx_rc_t
+efx_filter_spec_set_nvgre(
+       __inout         efx_filter_spec_t *spec,
+       __in            const uint8_t *vsid,
        __in            const uint8_t *inner_addr,
        __in            const uint8_t *outer_addr);
 
@@ -3214,6 +3258,21 @@ efx_phy_fec_type_get(
        __in            efx_nic_t *enp,
        __out           efx_phy_fec_type_t *typep);
 
+typedef struct efx_phy_link_state_s {
+       uint32_t                epls_adv_cap_mask;
+       uint32_t                epls_lp_cap_mask;
+       uint32_t                epls_ld_cap_mask;
+       unsigned int            epls_fcntl;
+       efx_phy_fec_type_t      epls_fec;
+       efx_link_mode_t         epls_link_mode;
+} efx_phy_link_state_t;
+
+extern __checkReturn   efx_rc_t
+efx_phy_link_state_get(
+       __in            efx_nic_t *enp,
+       __out           efx_phy_link_state_t  *eplsp);
+
+
 #ifdef __cplusplus
 }
 #endif