boolean_t enc_pm_and_rxdp_counters;
boolean_t enc_mac_stats_40g_tx_size_bins;
uint32_t enc_tunnel_encapsulations_supported;
+ /*
+ * NIC global maximum for unique UDP tunnel ports shared by all
+ * functions.
+ */
+ uint32_t enc_tunnel_config_udp_entries_max;
/* External port identifier */
uint8_t enc_external_port;
uint32_t enc_mcdi_max_payload_length;
extern efx_rc_t
efx_bootcfg_read(
__in efx_nic_t *enp,
- __out_bcount(size) caddr_t data,
+ __out_bcount(size) uint8_t *data,
__in size_t size);
extern efx_rc_t
efx_bootcfg_write(
__in efx_nic_t *enp,
- __in_bcount(size) caddr_t data,
+ __in_bcount(size) uint8_t *data,
__in size_t size);
#endif /* EFSYS_OPT_BOOTCFG */
typedef enum efx_rxq_type_e {
EFX_RXQ_TYPE_DEFAULT,
- EFX_RXQ_TYPE_SCATTER,
- EFX_RXQ_TYPE_PACKED_STREAM_1M,
- EFX_RXQ_TYPE_PACKED_STREAM_512K,
- EFX_RXQ_TYPE_PACKED_STREAM_256K,
- EFX_RXQ_TYPE_PACKED_STREAM_128K,
- EFX_RXQ_TYPE_PACKED_STREAM_64K,
+ EFX_RXQ_TYPE_PACKED_STREAM,
EFX_RXQ_NTYPES
} efx_rxq_type_t;
+/*
+ * Dummy flag to be used instead of 0 to make it clear that the argument
+ * is receive queue flags.
+ */
+#define EFX_RXQ_FLAG_NONE 0x0
+#define EFX_RXQ_FLAG_SCATTER 0x1
+/*
+ * If tunnels are supported and Rx event can provide information about
+ * either outer or inner packet classes (e.g. SFN8xxx adapters with
+ * full-feature firmware variant running), outer classes are requested by
+ * default. However, if the driver supports tunnels, the flag allows to
+ * request inner classes which are required to be able to interpret inner
+ * Rx checksum offload results.
+ */
+#define EFX_RXQ_FLAG_INNER_CLASSES 0x2
+
extern __checkReturn efx_rc_t
efx_rx_qcreate(
__in efx_nic_t *enp,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
+ __in unsigned int flags,
+ __in efx_evq_t *eep,
+ __deref_out efx_rxq_t **erpp);
+
+#if EFSYS_OPT_RX_PACKED_STREAM
+
+#define EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M (1U * 1024 * 1024)
+#define EFX_RXQ_PACKED_STREAM_BUF_SIZE_512K (512U * 1024)
+#define EFX_RXQ_PACKED_STREAM_BUF_SIZE_256K (256U * 1024)
+#define EFX_RXQ_PACKED_STREAM_BUF_SIZE_128K (128U * 1024)
+#define EFX_RXQ_PACKED_STREAM_BUF_SIZE_64K (64U * 1024)
+
+extern __checkReturn efx_rc_t
+efx_rx_qcreate_packed_stream(
+ __in efx_nic_t *enp,
+ __in unsigned int index,
+ __in unsigned int label,
+ __in uint32_t ps_buf_size,
+ __in efsys_mem_t *esmp,
+ __in size_t ndescs,
__in efx_evq_t *eep,
__deref_out efx_rxq_t **erpp);
+#endif
+
typedef struct efx_buffer_s {
efsys_dma_addr_t eb_addr;
size_t eb_size;
/* Filter is for TX */
#define EFX_FILTER_FLAG_TX 0x10
-typedef unsigned int efx_filter_flags_t;
+typedef uint8_t efx_filter_flags_t;
/*
* Flags which specify the fields to match on. The values are the same as in the
*/
typedef struct efx_filter_spec_s {
- uint32_t efs_match_flags;
- uint32_t efs_priority:2;
- uint32_t efs_flags:6;
- uint32_t efs_dmaq_id:12;
- uint32_t efs_rss_context;
- uint16_t efs_outer_vid;
- uint16_t efs_inner_vid;
- uint8_t efs_loc_mac[EFX_MAC_ADDR_LEN];
- uint8_t efs_rem_mac[EFX_MAC_ADDR_LEN];
- uint16_t efs_ether_type;
- uint8_t efs_ip_proto;
- efx_tunnel_protocol_t efs_encap_type;
- uint16_t efs_loc_port;
- uint16_t efs_rem_port;
- efx_oword_t efs_rem_host;
- efx_oword_t efs_loc_host;
+ efx_filter_match_flags_t efs_match_flags;
+ uint8_t efs_priority;
+ efx_filter_flags_t efs_flags;
+ uint16_t efs_dmaq_id;
+ uint32_t efs_rss_context;
+ uint16_t efs_outer_vid;
+ uint16_t efs_inner_vid;
+ uint8_t efs_loc_mac[EFX_MAC_ADDR_LEN];
+ uint8_t efs_rem_mac[EFX_MAC_ADDR_LEN];
+ uint16_t efs_ether_type;
+ uint8_t efs_ip_proto;
+ efx_tunnel_protocol_t efs_encap_type;
+ uint16_t efs_loc_port;
+ uint16_t efs_rem_port;
+ efx_oword_t efs_rem_host;
+ efx_oword_t efs_loc_host;
} efx_filter_spec_t;
#endif /* EFSYS_OPT_LICENSING */
+/* TUNNEL */
+
+#if EFSYS_OPT_TUNNEL
+
+extern __checkReturn efx_rc_t
+efx_tunnel_init(
+ __in efx_nic_t *enp);
+
+extern void
+efx_tunnel_fini(
+ __in efx_nic_t *enp);
+
+/*
+ * For overlay network encapsulation using UDP, the firmware needs to know
+ * the configured UDP port for the overlay so it can decode encapsulated
+ * frames correctly.
+ * The UDP port/protocol list is global.
+ */
+
+extern __checkReturn efx_rc_t
+efx_tunnel_config_udp_add(
+ __in efx_nic_t *enp,
+ __in uint16_t port /* host/cpu-endian */,
+ __in efx_tunnel_protocol_t protocol);
+
+extern __checkReturn efx_rc_t
+efx_tunnel_config_udp_remove(
+ __in efx_nic_t *enp,
+ __in uint16_t port /* host/cpu-endian */,
+ __in efx_tunnel_protocol_t protocol);
+
+extern void
+efx_tunnel_config_clear(
+ __in efx_nic_t *enp);
+
+/**
+ * Apply tunnel UDP ports configuration to hardware.
+ *
+ * EAGAIN is returned if hardware will be reset (datapath and managment CPU
+ * reboot).
+ */
+extern __checkReturn efx_rc_t
+efx_tunnel_reconfigure(
+ __in efx_nic_t *enp);
+
+#endif /* EFSYS_OPT_TUNNEL */
#ifdef __cplusplus