net/sfc/base: add API to control UDP tunnel ports

[dpdk.git] / drivers / net / sfc / base / efx.h

diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index e0dc76c..8c59a99 100644 (file)
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1205,6 +1205,11 @@ typedef struct efx_nic_cfg_s {
        boolean_t               enc_pm_and_rxdp_counters;
        boolean_t               enc_mac_stats_40g_tx_size_bins;
        uint32_t                enc_tunnel_encapsulations_supported;
+       /*
+        * NIC global maximum for unique UDP tunnel ports shared by all
+        * functions.
+        */
+       uint32_t                enc_tunnel_config_udp_entries_max;
        /* External port identifier */
        uint8_t                 enc_external_port;
        uint32_t                enc_mcdi_max_payload_length;
@@ -2002,11 +2007,7 @@ efx_pseudo_hdr_pkt_length_get(
 
 typedef enum efx_rxq_type_e {
        EFX_RXQ_TYPE_DEFAULT,
-       EFX_RXQ_TYPE_PACKED_STREAM_1M,
-       EFX_RXQ_TYPE_PACKED_STREAM_512K,
-       EFX_RXQ_TYPE_PACKED_STREAM_256K,
-       EFX_RXQ_TYPE_PACKED_STREAM_128K,
-       EFX_RXQ_TYPE_PACKED_STREAM_64K,
+       EFX_RXQ_TYPE_PACKED_STREAM,
        EFX_RXQ_NTYPES
 } efx_rxq_type_t;
 
@@ -2016,6 +2017,15 @@ typedef enum efx_rxq_type_e {
  */
 #define        EFX_RXQ_FLAG_NONE               0x0
 #define        EFX_RXQ_FLAG_SCATTER            0x1
+/*
+ * If tunnels are supported and Rx event can provide information about
+ * either outer or inner packet classes (e.g. SFN8xxx adapters with
+ * full-feature firmware variant running), outer classes are requested by
+ * default. However, if the driver supports tunnels, the flag allows to
+ * request inner classes which are required to be able to interpret inner
+ * Rx checksum offload results.
+ */
+#define        EFX_RXQ_FLAG_INNER_CLASSES      0x2
 
 extern __checkReturn   efx_rc_t
 efx_rx_qcreate(
@@ -2030,6 +2040,27 @@ efx_rx_qcreate(
        __in            efx_evq_t *eep,
        __deref_out     efx_rxq_t **erpp);
 
+#if EFSYS_OPT_RX_PACKED_STREAM
+
+#define        EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M       (1U * 1024 * 1024)
+#define        EFX_RXQ_PACKED_STREAM_BUF_SIZE_512K     (512U * 1024)
+#define        EFX_RXQ_PACKED_STREAM_BUF_SIZE_256K     (256U * 1024)
+#define        EFX_RXQ_PACKED_STREAM_BUF_SIZE_128K     (128U * 1024)
+#define        EFX_RXQ_PACKED_STREAM_BUF_SIZE_64K      (64U * 1024)
+
+extern __checkReturn   efx_rc_t
+efx_rx_qcreate_packed_stream(
+       __in            efx_nic_t *enp,
+       __in            unsigned int index,
+       __in            unsigned int label,
+       __in            uint32_t ps_buf_size,
+       __in            efsys_mem_t *esmp,
+       __in            size_t ndescs,
+       __in            efx_evq_t *eep,
+       __deref_out     efx_rxq_t **erpp);
+
+#endif
+
 typedef struct efx_buffer_s {
        efsys_dma_addr_t        eb_addr;
        size_t                  eb_size;
@@ -2605,6 +2636,52 @@ efx_lic_finish_partition(
 
 #endif /* EFSYS_OPT_LICENSING */
 
+/* TUNNEL */
+
+#if EFSYS_OPT_TUNNEL
+
+extern __checkReturn   efx_rc_t
+efx_tunnel_init(
+       __in            efx_nic_t *enp);
+
+extern                 void
+efx_tunnel_fini(
+       __in            efx_nic_t *enp);
+
+/*
+ * For overlay network encapsulation using UDP, the firmware needs to know
+ * the configured UDP port for the overlay so it can decode encapsulated
+ * frames correctly.
+ * The UDP port/protocol list is global.
+ */
+
+extern __checkReturn   efx_rc_t
+efx_tunnel_config_udp_add(
+       __in            efx_nic_t *enp,
+       __in            uint16_t port /* host/cpu-endian */,
+       __in            efx_tunnel_protocol_t protocol);
+
+extern __checkReturn   efx_rc_t
+efx_tunnel_config_udp_remove(
+       __in            efx_nic_t *enp,
+       __in            uint16_t port /* host/cpu-endian */,
+       __in            efx_tunnel_protocol_t protocol);
+
+extern                 void
+efx_tunnel_config_clear(
+       __in            efx_nic_t *enp);
+
+/**
+ * Apply tunnel UDP ports configuration to hardware.
+ *
+ * EAGAIN is returned if hardware will be reset (datapath and managment CPU
+ * reboot).
+ */
+extern __checkReturn   efx_rc_t
+efx_tunnel_reconfigure(
+       __in            efx_nic_t *enp);
+
+#endif /* EFSYS_OPT_TUNNEL */
 
 
 #ifdef __cplusplus