/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright (c) 2007-2018 Solarflare Communications Inc.
- * All rights reserved.
+ * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2007-2019 Solarflare Communications Inc.
*/
#include "efx.h"
};
#endif /* EFSYS_OPT_SIENA */
-#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
+#if EFX_OPTS_EF10()
static const efx_rx_ops_t __efx_rx_ef10_ops = {
ef10_rx_init, /* erxo_init */
ef10_rx_fini, /* erxo_fini */
ef10_rx_qcreate, /* erxo_qcreate */
ef10_rx_qdestroy, /* erxo_qdestroy */
};
-#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
+#endif /* EFX_OPTS_EF10() */
__checkReturn efx_rc_t
const efx_rx_ops_t *erxop = enp->en_erxop;
EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
+ EFSYS_ASSERT(erp->er_buf_size == 0 || size == erp->er_buf_size);
erxop->erxo_qpost(erp, addrp, size, ndescs, completed, added);
}
__in const efx_nic_t *enp,
__in unsigned int ndescs)
{
- return (efx_rxq_size(enp, ndescs) / EFX_BUF_SIZE);
+ return (EFX_DIV_ROUND_UP(efx_rxq_size(enp, ndescs), EFX_BUF_SIZE));
}
void
__in unsigned int index,
__in unsigned int label,
__in efx_rxq_type_t type,
+ __in size_t buf_size,
__in efsys_mem_t *esmp,
__in size_t ndescs,
__in uint32_t id,
__in efx_evq_t *eep,
__deref_out efx_rxq_t **erpp)
{
- return efx_rx_qcreate_internal(enp, index, label, type, NULL,
+ efx_rxq_type_data_t type_data;
+
+ memset(&type_data, 0, sizeof (type_data));
+
+ type_data.ertd_default.ed_buf_size = buf_size;
+
+ return efx_rx_qcreate_internal(enp, index, label, type, &type_data,
esmp, ndescs, id, flags, eep, erpp);
}
efx_rc_t rc;
_NOTE(ARGUNUSED(esmp))
- _NOTE(ARGUNUSED(type_data))
EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS ==
(1 << FRF_AZ_RX_DESCQ_LABEL_WIDTH));
switch (type) {
case EFX_RXQ_TYPE_DEFAULT:
+ erp->er_buf_size = type_data->ertd_default.ed_buf_size;
break;
default: