net/sfc/base: fix PreFAST static analysis warning (C6001)
[dpdk.git] / drivers / net / sfc / base / efx_rx.c
index 330d2aa..f922b59 100644 (file)
@@ -53,6 +53,7 @@ siena_rx_scatter_enable(
 static __checkReturn   efx_rc_t
 siena_rx_scale_mode_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in            efx_rx_hash_alg_t alg,
        __in            efx_rx_hash_type_t type,
        __in            boolean_t insert);
@@ -60,12 +61,14 @@ siena_rx_scale_mode_set(
 static __checkReturn   efx_rc_t
 siena_rx_scale_key_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in_ecount(n)  uint8_t *key,
        __in            size_t n);
 
 static __checkReturn   efx_rc_t
 siena_rx_scale_tbl_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in_ecount(n)  unsigned int *table,
        __in            size_t n);
 
@@ -83,14 +86,14 @@ siena_rx_prefix_pktlen(
        __in            uint8_t *buffer,
        __out           uint16_t *lengthp);
 
-static                 void
+static                         void
 siena_rx_qpost(
-       __in            efx_rxq_t *erp,
-       __in_ecount(n)  efsys_dma_addr_t *addrp,
-       __in            size_t size,
-       __in            unsigned int n,
-       __in            unsigned int completed,
-       __in            unsigned int added);
+       __in                    efx_rxq_t *erp,
+       __in_ecount(ndescs)     efsys_dma_addr_t *addrp,
+       __in                    size_t size,
+       __in                    unsigned int ndescs,
+       __in                    unsigned int completed,
+       __in                    unsigned int added);
 
 static                 void
 siena_rx_qpush(
@@ -100,7 +103,7 @@ siena_rx_qpush(
 
 #if EFSYS_OPT_RX_PACKED_STREAM
 static         void
-siena_rx_qps_update_credits(
+siena_rx_qpush_ps_credits(
        __in            efx_rxq_t *erp);
 
 static __checkReturn   uint8_t *
@@ -129,7 +132,7 @@ siena_rx_qcreate(
        __in            unsigned int label,
        __in            efx_rxq_type_t type,
        __in            efsys_mem_t *esmp,
-       __in            size_t n,
+       __in            size_t ndescs,
        __in            uint32_t id,
        __in            efx_evq_t *eep,
        __in            efx_rxq_t *erp);
@@ -149,6 +152,8 @@ static const efx_rx_ops_t __efx_rx_siena_ops = {
        siena_rx_scatter_enable,                /* erxo_scatter_enable */
 #endif
 #if EFSYS_OPT_RX_SCALE
+       NULL,                                   /* erxo_scale_context_alloc */
+       NULL,                                   /* erxo_scale_context_free */
        siena_rx_scale_mode_set,                /* erxo_scale_mode_set */
        siena_rx_scale_key_set,                 /* erxo_scale_key_set */
        siena_rx_scale_tbl_set,                 /* erxo_scale_tbl_set */
@@ -158,7 +163,7 @@ static const efx_rx_ops_t __efx_rx_siena_ops = {
        siena_rx_qpost,                         /* erxo_qpost */
        siena_rx_qpush,                         /* erxo_qpush */
 #if EFSYS_OPT_RX_PACKED_STREAM
-       siena_rx_qps_update_credits,            /* erxo_qps_update_credits */
+       siena_rx_qpush_ps_credits,              /* erxo_qpush_ps_credits */
        siena_rx_qps_packet_info,               /* erxo_qps_packet_info */
 #endif
        siena_rx_qflush,                        /* erxo_qflush */
@@ -176,6 +181,8 @@ static const efx_rx_ops_t __efx_rx_ef10_ops = {
        ef10_rx_scatter_enable,                 /* erxo_scatter_enable */
 #endif
 #if EFSYS_OPT_RX_SCALE
+       ef10_rx_scale_context_alloc,            /* erxo_scale_context_alloc */
+       ef10_rx_scale_context_free,             /* erxo_scale_context_free */
        ef10_rx_scale_mode_set,                 /* erxo_scale_mode_set */
        ef10_rx_scale_key_set,                  /* erxo_scale_key_set */
        ef10_rx_scale_tbl_set,                  /* erxo_scale_tbl_set */
@@ -185,7 +192,7 @@ static const efx_rx_ops_t __efx_rx_ef10_ops = {
        ef10_rx_qpost,                          /* erxo_qpost */
        ef10_rx_qpush,                          /* erxo_qpush */
 #if EFSYS_OPT_RX_PACKED_STREAM
-       ef10_rx_qps_update_credits,             /* erxo_qps_update_credits */
+       ef10_rx_qpush_ps_credits,               /* erxo_qpush_ps_credits */
        ef10_rx_qps_packet_info,                /* erxo_qps_packet_info */
 #endif
        ef10_rx_qflush,                         /* erxo_qflush */
@@ -304,7 +311,7 @@ fail1:
 
 #if EFSYS_OPT_RX_SCALE
        __checkReturn   efx_rc_t
-efx_rx_hash_support_get(
+efx_rx_hash_default_support_get(
        __in            efx_nic_t *enp,
        __out           efx_rx_hash_support_t *supportp)
 {
@@ -318,7 +325,10 @@ efx_rx_hash_support_get(
                goto fail1;
        }
 
-       /* Report if resources are available to insert RX hash value */
+       /*
+        * Report the hashing support the client gets by default if it
+        * does not allocate an RSS context itself.
+        */
        *supportp = enp->en_hash_support;
 
        return (0);
@@ -330,22 +340,25 @@ fail1:
 }
 
        __checkReturn   efx_rc_t
-efx_rx_scale_support_get(
+efx_rx_scale_default_support_get(
        __in            efx_nic_t *enp,
-       __out           efx_rx_scale_support_t *supportp)
+       __out           efx_rx_scale_context_type_t *typep)
 {
        efx_rc_t rc;
 
        EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
        EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
 
-       if (supportp == NULL) {
+       if (typep == NULL) {
                rc = EINVAL;
                goto fail1;
        }
 
-       /* Report if resources are available to support RSS */
-       *supportp = enp->en_rss_support;
+       /*
+        * Report the RSS support the client gets by default if it
+        * does not allocate an RSS context itself.
+        */
+       *typep = enp->en_rss_context_type;
 
        return (0);
 
@@ -354,10 +367,75 @@ fail1:
 
        return (rc);
 }
+#endif /* EFSYS_OPT_RX_SCALE */
 
+#if EFSYS_OPT_RX_SCALE
+       __checkReturn   efx_rc_t
+efx_rx_scale_context_alloc(
+       __in            efx_nic_t *enp,
+       __in            efx_rx_scale_context_type_t type,
+       __in            uint32_t num_queues,
+       __out           uint32_t *rss_contextp)
+{
+       const efx_rx_ops_t *erxop = enp->en_erxop;
+       efx_rc_t rc;
+
+       EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+       EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
+
+       if (erxop->erxo_scale_context_alloc == NULL) {
+               rc = ENOTSUP;
+               goto fail1;
+       }
+       if ((rc = erxop->erxo_scale_context_alloc(enp, type,
+                           num_queues, rss_contextp)) != 0) {
+               goto fail2;
+       }
+
+       return (0);
+
+fail2:
+       EFSYS_PROBE(fail2);
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+       return (rc);
+}
+#endif /* EFSYS_OPT_RX_SCALE */
+
+#if EFSYS_OPT_RX_SCALE
+       __checkReturn   efx_rc_t
+efx_rx_scale_context_free(
+       __in            efx_nic_t *enp,
+       __in            uint32_t rss_context)
+{
+       const efx_rx_ops_t *erxop = enp->en_erxop;
+       efx_rc_t rc;
+
+       EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+       EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
+
+       if (erxop->erxo_scale_context_free == NULL) {
+               rc = ENOTSUP;
+               goto fail1;
+       }
+       if ((rc = erxop->erxo_scale_context_free(enp, rss_context)) != 0)
+               goto fail2;
+
+       return (0);
+
+fail2:
+       EFSYS_PROBE(fail2);
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+       return (rc);
+}
+#endif /* EFSYS_OPT_RX_SCALE */
+
+#if EFSYS_OPT_RX_SCALE
        __checkReturn   efx_rc_t
 efx_rx_scale_mode_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in            efx_rx_hash_alg_t alg,
        __in            efx_rx_hash_type_t type,
        __in            boolean_t insert)
@@ -369,7 +447,7 @@ efx_rx_scale_mode_set(
        EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
 
        if (erxop->erxo_scale_mode_set != NULL) {
-               if ((rc = erxop->erxo_scale_mode_set(enp, alg,
+               if ((rc = erxop->erxo_scale_mode_set(enp, rss_context, alg,
                            type, insert)) != 0)
                        goto fail1;
        }
@@ -386,6 +464,7 @@ fail1:
        __checkReturn   efx_rc_t
 efx_rx_scale_key_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in_ecount(n)  uint8_t *key,
        __in            size_t n)
 {
@@ -395,7 +474,7 @@ efx_rx_scale_key_set(
        EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
        EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
 
-       if ((rc = erxop->erxo_scale_key_set(enp, key, n)) != 0)
+       if ((rc = erxop->erxo_scale_key_set(enp, rss_context, key, n)) != 0)
                goto fail1;
 
        return (0);
@@ -411,6 +490,7 @@ fail1:
        __checkReturn   efx_rc_t
 efx_rx_scale_tbl_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in_ecount(n)  unsigned int *table,
        __in            size_t n)
 {
@@ -420,7 +500,7 @@ efx_rx_scale_tbl_set(
        EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
        EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
 
-       if ((rc = erxop->erxo_scale_tbl_set(enp, table, n)) != 0)
+       if ((rc = erxop->erxo_scale_tbl_set(enp, rss_context, table, n)) != 0)
                goto fail1;
 
        return (0);
@@ -432,27 +512,27 @@ fail1:
 }
 #endif /* EFSYS_OPT_RX_SCALE */
 
-                       void
+                               void
 efx_rx_qpost(
-       __in            efx_rxq_t *erp,
-       __in_ecount(n)  efsys_dma_addr_t *addrp,
-       __in            size_t size,
-       __in            unsigned int n,
-       __in            unsigned int completed,
-       __in            unsigned int added)
+       __in                    efx_rxq_t *erp,
+       __in_ecount(ndescs)     efsys_dma_addr_t *addrp,
+       __in                    size_t size,
+       __in                    unsigned int ndescs,
+       __in                    unsigned int completed,
+       __in                    unsigned int added)
 {
        efx_nic_t *enp = erp->er_enp;
        const efx_rx_ops_t *erxop = enp->en_erxop;
 
        EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 
-       erxop->erxo_qpost(erp, addrp, size, n, completed, added);
+       erxop->erxo_qpost(erp, addrp, size, ndescs, completed, added);
 }
 
 #if EFSYS_OPT_RX_PACKED_STREAM
 
                        void
-efx_rx_qps_update_credits(
+efx_rx_qpush_ps_credits(
        __in            efx_rxq_t *erp)
 {
        efx_nic_t *enp = erp->er_enp;
@@ -460,7 +540,7 @@ efx_rx_qps_update_credits(
 
        EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 
-       erxop->erxo_qps_update_credits(erp);
+       erxop->erxo_qpush_ps_credits(erp);
 }
 
        __checkReturn   uint8_t *
@@ -537,7 +617,7 @@ efx_rx_qcreate(
        __in            unsigned int label,
        __in            efx_rxq_type_t type,
        __in            efsys_mem_t *esmp,
-       __in            size_t n,
+       __in            size_t ndescs,
        __in            uint32_t id,
        __in            efx_evq_t *eep,
        __deref_out     efx_rxq_t **erpp)
@@ -560,10 +640,10 @@ efx_rx_qcreate(
        erp->er_magic = EFX_RXQ_MAGIC;
        erp->er_enp = enp;
        erp->er_index = index;
-       erp->er_mask = n - 1;
+       erp->er_mask = ndescs - 1;
        erp->er_esmp = esmp;
 
-       if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, n, id,
+       if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, ndescs, id,
            eep, erp)) != 0)
                goto fail2;
 
@@ -654,7 +734,7 @@ siena_rx_init(
 
 #if EFSYS_OPT_RX_SCALE
        /* The RSS key and indirection table are writable. */
-       enp->en_rss_support = EFX_RX_SCALE_EXCLUSIVE;
+       enp->en_rss_context_type = EFX_RX_SCALE_EXCLUSIVE;
 
        /* Hardware can insert RX hash with/without RSS */
        enp->en_hash_support = EFX_RX_HASH_AVAILABLE;
@@ -773,12 +853,18 @@ fail1:
 static __checkReturn   efx_rc_t
 siena_rx_scale_mode_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in            efx_rx_hash_alg_t alg,
        __in            efx_rx_hash_type_t type,
        __in            boolean_t insert)
 {
        efx_rc_t rc;
 
+       if (rss_context != EFX_RSS_CONTEXT_DEFAULT) {
+               rc = EINVAL;
+               goto fail1;
+       }
+
        switch (alg) {
        case EFX_RX_HASHALG_LFSR:
                EFX_RX_LFSR_HASH(enp, insert);
@@ -786,25 +872,27 @@ siena_rx_scale_mode_set(
 
        case EFX_RX_HASHALG_TOEPLITZ:
                EFX_RX_TOEPLITZ_IPV4_HASH(enp, insert,
-                   type & (1 << EFX_RX_HASH_IPV4),
-                   type & (1 << EFX_RX_HASH_TCPIPV4));
+                   type & EFX_RX_HASH_IPV4,
+                   type & EFX_RX_HASH_TCPIPV4);
 
                EFX_RX_TOEPLITZ_IPV6_HASH(enp,
-                   type & (1 << EFX_RX_HASH_IPV6),
-                   type & (1 << EFX_RX_HASH_TCPIPV6),
+                   type & EFX_RX_HASH_IPV6,
+                   type & EFX_RX_HASH_TCPIPV6,
                    rc);
                if (rc != 0)
-                       goto fail1;
+                       goto fail2;
 
                break;
 
        default:
                rc = EINVAL;
-               goto fail2;
+               goto fail3;
        }
 
        return (0);
 
+fail3:
+       EFSYS_PROBE(fail3);
 fail2:
        EFSYS_PROBE(fail2);
 fail1:
@@ -820,6 +908,7 @@ fail1:
 static __checkReturn   efx_rc_t
 siena_rx_scale_key_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in_ecount(n)  uint8_t *key,
        __in            size_t n)
 {
@@ -828,6 +917,11 @@ siena_rx_scale_key_set(
        unsigned int offset;
        efx_rc_t rc;
 
+       if (rss_context != EFX_RSS_CONTEXT_DEFAULT) {
+               rc = EINVAL;
+               goto fail1;
+       }
+
        byte = 0;
 
        /* Write Toeplitz IPv4 hash key */
@@ -848,7 +942,7 @@ siena_rx_scale_key_set(
            --offset) {
                if (oword.eo_u8[offset - 1] != key[byte++]) {
                        rc = EFAULT;
-                       goto fail1;
+                       goto fail2;
                }
        }
 
@@ -897,7 +991,7 @@ siena_rx_scale_key_set(
            --offset) {
                if (oword.eo_u8[offset - 1] != key[byte++]) {
                        rc = EFAULT;
-                       goto fail2;
+                       goto fail3;
                }
        }
 
@@ -909,7 +1003,7 @@ siena_rx_scale_key_set(
            --offset) {
                if (oword.eo_u8[offset - 1] != key[byte++]) {
                        rc = EFAULT;
-                       goto fail3;
+                       goto fail4;
                }
        }
 
@@ -921,13 +1015,15 @@ siena_rx_scale_key_set(
            --offset) {
                if (oword.eo_u8[offset - 1] != key[byte++]) {
                        rc = EFAULT;
-                       goto fail4;
+                       goto fail5;
                }
        }
 
 done:
        return (0);
 
+fail5:
+       EFSYS_PROBE(fail5);
 fail4:
        EFSYS_PROBE(fail4);
 fail3:
@@ -945,6 +1041,7 @@ fail1:
 static __checkReturn   efx_rc_t
 siena_rx_scale_tbl_set(
        __in            efx_nic_t *enp,
+       __in            uint32_t rss_context,
        __in_ecount(n)  unsigned int *table,
        __in            size_t n)
 {
@@ -955,11 +1052,16 @@ siena_rx_scale_tbl_set(
        EFX_STATIC_ASSERT(EFX_RSS_TBL_SIZE == FR_BZ_RX_INDIRECTION_TBL_ROWS);
        EFX_STATIC_ASSERT(EFX_MAXRSS == (1 << FRF_BZ_IT_QUEUE_WIDTH));
 
-       if (n > FR_BZ_RX_INDIRECTION_TBL_ROWS) {
+       if (rss_context != EFX_RSS_CONTEXT_DEFAULT) {
                rc = EINVAL;
                goto fail1;
        }
 
+       if (n > FR_BZ_RX_INDIRECTION_TBL_ROWS) {
+               rc = EINVAL;
+               goto fail2;
+       }
+
        for (index = 0; index < FR_BZ_RX_INDIRECTION_TBL_ROWS; index++) {
                uint32_t byte;
 
@@ -988,12 +1090,14 @@ siena_rx_scale_tbl_set(
                /* Verify the entry */
                if (EFX_OWORD_FIELD(oword, FRF_BZ_IT_QUEUE) != byte) {
                        rc = EFAULT;
-                       goto fail2;
+                       goto fail3;
                }
        }
 
        return (0);
 
+fail3:
+       EFSYS_PROBE(fail3);
 fail2:
        EFSYS_PROBE(fail2);
 fail1:
@@ -1059,14 +1163,14 @@ siena_rx_prefix_pktlen(
 }
 
 
-static                 void
+static                         void
 siena_rx_qpost(
-       __in            efx_rxq_t *erp,
-       __in_ecount(n)  efsys_dma_addr_t *addrp,
-       __in            size_t size,
-       __in            unsigned int n,
-       __in            unsigned int completed,
-       __in            unsigned int added)
+       __in                    efx_rxq_t *erp,
+       __in_ecount(ndescs)     efsys_dma_addr_t *addrp,
+       __in                    size_t size,
+       __in                    unsigned int ndescs,
+       __in                    unsigned int completed,
+       __in                    unsigned int added)
 {
        efx_qword_t qword;
        unsigned int i;
@@ -1074,11 +1178,11 @@ siena_rx_qpost(
        unsigned int id;
 
        /* The client driver must not overfill the queue */
-       EFSYS_ASSERT3U(added - completed + n, <=,
+       EFSYS_ASSERT3U(added - completed + ndescs, <=,
            EFX_RXQ_LIMIT(erp->er_mask + 1));
 
        id = added & (erp->er_mask);
-       for (i = 0; i < n; i++) {
+       for (i = 0; i < ndescs; i++) {
                EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
                    unsigned int, id, efsys_dma_addr_t, addrp[i],
                    size_t, size);
@@ -1131,7 +1235,7 @@ siena_rx_qpush(
 
 #if EFSYS_OPT_RX_PACKED_STREAM
 static         void
-siena_rx_qps_update_credits(
+siena_rx_qpush_ps_credits(
        __in            efx_rxq_t *erp)
 {
        /* Not supported by Siena hardware */
@@ -1200,7 +1304,7 @@ siena_rx_qcreate(
        __in            unsigned int label,
        __in            efx_rxq_type_t type,
        __in            efsys_mem_t *esmp,
-       __in            size_t n,
+       __in            size_t ndescs,
        __in            uint32_t id,
        __in            efx_evq_t *eep,
        __in            efx_rxq_t *erp)
@@ -1221,7 +1325,8 @@ siena_rx_qcreate(
        EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
        EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
 
-       if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
+       if (!ISP2(ndescs) ||
+           (ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
                rc = EINVAL;
                goto fail1;
        }
@@ -1231,7 +1336,7 @@ siena_rx_qcreate(
        }
        for (size = 0; (1 << size) <= (EFX_RXQ_MAXNDESCS / EFX_RXQ_MINNDESCS);
            size++)
-               if ((1 << size) == (int)(n / EFX_RXQ_MINNDESCS))
+               if ((1 << size) == (int)(ndescs / EFX_RXQ_MINNDESCS))
                        break;
        if (id + (1 << size) >= encp->enc_buftbl_limit) {
                rc = EINVAL;
@@ -1245,10 +1350,6 @@ siena_rx_qcreate(
 
 #if EFSYS_OPT_RX_SCATTER
        case EFX_RXQ_TYPE_SCATTER:
-               if (enp->en_family < EFX_FAMILY_SIENA) {
-                       rc = EINVAL;
-                       goto fail4;
-               }
                jumbo = B_TRUE;
                break;
 #endif /* EFSYS_OPT_RX_SCATTER */