__in uint8_t *buffer,
__out uint16_t *lengthp);
-static void
+static void
siena_rx_qpost(
- __in efx_rxq_t *erp,
- __in_ecount(n) efsys_dma_addr_t *addrp,
- __in size_t size,
- __in unsigned int n,
- __in unsigned int completed,
- __in unsigned int added);
+ __in efx_rxq_t *erp,
+ __in_ecount(ndescs) efsys_dma_addr_t *addrp,
+ __in size_t size,
+ __in unsigned int ndescs,
+ __in unsigned int completed,
+ __in unsigned int added);
static void
siena_rx_qpush(
#if EFSYS_OPT_RX_PACKED_STREAM
static void
-siena_rx_qps_update_credits(
+siena_rx_qpush_ps_credits(
__in efx_rxq_t *erp);
static __checkReturn uint8_t *
__in unsigned int label,
__in efx_rxq_type_t type,
__in efsys_mem_t *esmp,
- __in size_t n,
+ __in size_t ndescs,
__in uint32_t id,
__in efx_evq_t *eep,
__in efx_rxq_t *erp);
siena_rx_qpost, /* erxo_qpost */
siena_rx_qpush, /* erxo_qpush */
#if EFSYS_OPT_RX_PACKED_STREAM
- siena_rx_qps_update_credits, /* erxo_qps_update_credits */
+ siena_rx_qpush_ps_credits, /* erxo_qpush_ps_credits */
siena_rx_qps_packet_info, /* erxo_qps_packet_info */
#endif
siena_rx_qflush, /* erxo_qflush */
ef10_rx_qpost, /* erxo_qpost */
ef10_rx_qpush, /* erxo_qpush */
#if EFSYS_OPT_RX_PACKED_STREAM
- ef10_rx_qps_update_credits, /* erxo_qps_update_credits */
+ ef10_rx_qpush_ps_credits, /* erxo_qpush_ps_credits */
ef10_rx_qps_packet_info, /* erxo_qps_packet_info */
#endif
ef10_rx_qflush, /* erxo_qflush */
}
#endif /* EFSYS_OPT_RX_SCALE */
- void
+ void
efx_rx_qpost(
- __in efx_rxq_t *erp,
- __in_ecount(n) efsys_dma_addr_t *addrp,
- __in size_t size,
- __in unsigned int n,
- __in unsigned int completed,
- __in unsigned int added)
+ __in efx_rxq_t *erp,
+ __in_ecount(ndescs) efsys_dma_addr_t *addrp,
+ __in size_t size,
+ __in unsigned int ndescs,
+ __in unsigned int completed,
+ __in unsigned int added)
{
efx_nic_t *enp = erp->er_enp;
const efx_rx_ops_t *erxop = enp->en_erxop;
EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
- erxop->erxo_qpost(erp, addrp, size, n, completed, added);
+ erxop->erxo_qpost(erp, addrp, size, ndescs, completed, added);
}
#if EFSYS_OPT_RX_PACKED_STREAM
void
-efx_rx_qps_update_credits(
+efx_rx_qpush_ps_credits(
__in efx_rxq_t *erp)
{
efx_nic_t *enp = erp->er_enp;
EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
- erxop->erxo_qps_update_credits(erp);
+ erxop->erxo_qpush_ps_credits(erp);
}
__checkReturn uint8_t *
__in unsigned int label,
__in efx_rxq_type_t type,
__in efsys_mem_t *esmp,
- __in size_t n,
+ __in size_t ndescs,
__in uint32_t id,
__in efx_evq_t *eep,
__deref_out efx_rxq_t **erpp)
erp->er_magic = EFX_RXQ_MAGIC;
erp->er_enp = enp;
erp->er_index = index;
- erp->er_mask = n - 1;
+ erp->er_mask = ndescs - 1;
erp->er_esmp = esmp;
- if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, n, id,
+ if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, ndescs, id,
eep, erp)) != 0)
goto fail2;
}
-static void
+static void
siena_rx_qpost(
- __in efx_rxq_t *erp,
- __in_ecount(n) efsys_dma_addr_t *addrp,
- __in size_t size,
- __in unsigned int n,
- __in unsigned int completed,
- __in unsigned int added)
+ __in efx_rxq_t *erp,
+ __in_ecount(ndescs) efsys_dma_addr_t *addrp,
+ __in size_t size,
+ __in unsigned int ndescs,
+ __in unsigned int completed,
+ __in unsigned int added)
{
efx_qword_t qword;
unsigned int i;
unsigned int id;
/* The client driver must not overfill the queue */
- EFSYS_ASSERT3U(added - completed + n, <=,
+ EFSYS_ASSERT3U(added - completed + ndescs, <=,
EFX_RXQ_LIMIT(erp->er_mask + 1));
id = added & (erp->er_mask);
- for (i = 0; i < n; i++) {
+ for (i = 0; i < ndescs; i++) {
EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
unsigned int, id, efsys_dma_addr_t, addrp[i],
size_t, size);
#if EFSYS_OPT_RX_PACKED_STREAM
static void
-siena_rx_qps_update_credits(
+siena_rx_qpush_ps_credits(
__in efx_rxq_t *erp)
{
/* Not supported by Siena hardware */
__in unsigned int label,
__in efx_rxq_type_t type,
__in efsys_mem_t *esmp,
- __in size_t n,
+ __in size_t ndescs,
__in uint32_t id,
__in efx_evq_t *eep,
__in efx_rxq_t *erp)
EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
- if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
+ if (!ISP2(ndescs) ||
+ (ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
rc = EINVAL;
goto fail1;
}
}
for (size = 0; (1 << size) <= (EFX_RXQ_MAXNDESCS / EFX_RXQ_MINNDESCS);
size++)
- if ((1 << size) == (int)(n / EFX_RXQ_MINNDESCS))
+ if ((1 << size) == (int)(ndescs / EFX_RXQ_MINNDESCS))
break;
if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL;
#if EFSYS_OPT_RX_SCATTER
case EFX_RXQ_TYPE_SCATTER:
- if (enp->en_family < EFX_FAMILY_SIENA) {
- rc = EINVAL;
- goto fail4;
- }
jumbo = B_TRUE;
break;
#endif /* EFSYS_OPT_RX_SCATTER */