net/sfc/base: add equal stride super-buffer prefix layout

[dpdk.git] / drivers / net / sfc / base / hunt_nic.c

diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index b19b41e..16ea81d 100644 (file)
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -36,7 +36,7 @@ hunt_nic_get_required_pcie_bandwidth(
                goto out;
        }
 
-       if (port_modes & (1 << TLV_PORT_MODE_40G_40G)) {
+       if (port_modes & (1U << TLV_PORT_MODE_40G_40G)) {
                /*
                 * This needs the full PCIe bandwidth (and could use
                 * more) - roughly 64 Gbit/s for 8 lanes of Gen3.
@@ -45,9 +45,9 @@ hunt_nic_get_required_pcie_bandwidth(
                            EFX_PCIE_LINK_SPEED_GEN3, &bandwidth)) != 0)
                        goto fail1;
        } else {
-               if (port_modes & (1 << TLV_PORT_MODE_40G)) {
+               if (port_modes & (1U << TLV_PORT_MODE_40G)) {
                        max_port_mode = TLV_PORT_MODE_40G;
-               } else if (port_modes & (1 << TLV_PORT_MODE_10G_10G_10G_10G)) {
+               } else if (port_modes & (1U << TLV_PORT_MODE_10G_10G_10G_10G)) {
                        max_port_mode = TLV_PORT_MODE_10G_10G_10G_10G;
                } else {
                        /* Assume two 10G ports */
@@ -78,22 +78,11 @@ hunt_board_cfg(
 {
        efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
        efx_port_t *epp = &(enp->en_port);
-       uint32_t mask;
        uint32_t flags;
        uint32_t sysclk, dpcpu_clk;
        uint32_t bandwidth;
        efx_rc_t rc;
 
-       /* Huntington has a fixed 8Kbyte VI window size */
-       EFX_STATIC_ASSERT(ER_DZ_EVQ_RPTR_REG_STEP       == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_EVQ_TMR_REG_STEP        == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_RX_DESC_UPD_REG_STEP    == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_TX_DESC_UPD_REG_STEP    == 8192);
-       EFX_STATIC_ASSERT(ER_DZ_TX_PIOBUF_STEP          == 8192);
-
-       EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K  == 8192);
-       encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K;
-
        /*
         * Enable firmware workarounds for hardware errata.
         * Expected responses are:
@@ -215,18 +204,8 @@ hunt_board_cfg(
        encp->enc_piobuf_size = HUNT_PIOBUF_SIZE;
        encp->enc_piobuf_min_alloc_size = HUNT_MIN_PIO_ALLOC_SIZE;
 
-       /*
-        * Get the current privilege mask. Note that this may be modified
-        * dynamically, so this value is informational only. DO NOT use
-        * the privilege mask to check for sufficient privileges, as that
-        * can result in time-of-check/time-of-use bugs.
-        */
-       if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
-               goto fail5;
-       encp->enc_privilege_mask = mask;
-
        if ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0)
-               goto fail6;
+               goto fail5;
        encp->enc_required_pcie_bandwidth_mbps = bandwidth;
 
        /* All Huntington devices have a PCIe Gen3, 8 lane connector */
@@ -234,8 +213,6 @@ hunt_board_cfg(
 
        return (0);
 
-fail6:
-       EFSYS_PROBE(fail6);
 fail5:
        EFSYS_PROBE(fail5);
 fail4: