{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
efx_port_t *epp = &(enp->en_port);
- uint32_t flags;
uint32_t sysclk, dpcpu_clk;
uint32_t bandwidth;
efx_rc_t rc;
encp->enc_bug41750_workaround = B_TRUE;
}
- /*
- * If the bug26807 workaround is enabled, then firmware has enabled
- * support for chained multicast filters. Firmware will reset (FLR)
- * functions which have filters in the hardware filter table when the
- * workaround is enabled/disabled.
- *
- * We must recheck if the workaround is enabled after inserting the
- * first hardware filter, in case it has been changed since this check.
- */
- rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG26807,
- B_TRUE, &flags);
- if (rc == 0) {
- encp->enc_bug26807_workaround = B_TRUE;
- if (flags & (1 << MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN)) {
- /*
- * Other functions had installed filters before the
- * workaround was enabled, and they have been reset
- * by firmware.
- */
- EFSYS_PROBE(bug26807_workaround_flr_done);
- /* FIXME: bump MC warm boot count ? */
- }
- } else if (rc == EACCES) {
- /*
- * Unprivileged functions cannot enable the workaround in older
- * firmware.
- */
- encp->enc_bug26807_workaround = B_FALSE;
- } else if ((rc == ENOTSUP) || (rc == ENOENT)) {
- encp->enc_bug26807_workaround = B_FALSE;
- } else {
- goto fail3;
- }
-
/* Get clock frequencies (in MHz). */
if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
- goto fail4;
+ goto fail3;
/*
* The Huntington timer quantum is 1536 sysclk cycles, documented for
/* Checksums for TSO sends can be incorrect on Huntington. */
encp->enc_bug61297_workaround = B_TRUE;
+ encp->enc_ev_desc_size = EF10_EVQ_DESC_SIZE;
+ encp->enc_rx_desc_size = EF10_RXQ_DESC_SIZE;
+ encp->enc_tx_desc_size = EF10_TXQ_DESC_SIZE;
+
/* Alignment for receive packet DMA buffers */
encp->enc_rx_buf_align_start = 1;
encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */
encp->enc_piobuf_min_alloc_size = HUNT_MIN_PIO_ALLOC_SIZE;
if ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0)
- goto fail5;
+ goto fail4;
encp->enc_required_pcie_bandwidth_mbps = bandwidth;
/* All Huntington devices have a PCIe Gen3, 8 lane connector */
return (0);
-fail5:
- EFSYS_PROBE(fail5);
fail4:
EFSYS_PROBE(fail4);
fail3: