net/sfc/base: fix name of the argument to store RSS flags

[dpdk.git] / drivers / net / sfc / base / hunt_nic.c

diff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c
index e39f817..70c042f 100644 (file)
--- a/drivers/net/sfc/base/hunt_nic.c
+++ b/drivers/net/sfc/base/hunt_nic.c
@@ -30,13 +30,14 @@ hunt_nic_get_required_pcie_bandwidth(
         * capable mode is in use.
         */
 
-       if ((rc = efx_mcdi_get_port_modes(enp, &port_modes, NULL)) != 0) {
+       if ((rc = efx_mcdi_get_port_modes(enp, &port_modes,
+                   NULL, NULL)) != 0) {
                /* No port mode info available */
                bandwidth = 0;
                goto out;
        }
 
-       if (port_modes & (1 << TLV_PORT_MODE_40G_40G)) {
+       if (port_modes & (1U << TLV_PORT_MODE_40G_40G)) {
                /*
                 * This needs the full PCIe bandwidth (and could use
                 * more) - roughly 64 Gbit/s for 8 lanes of Gen3.
@@ -45,9 +46,9 @@ hunt_nic_get_required_pcie_bandwidth(
                            EFX_PCIE_LINK_SPEED_GEN3, &bandwidth)) != 0)
                        goto fail1;
        } else {
-               if (port_modes & (1 << TLV_PORT_MODE_40G)) {
+               if (port_modes & (1U << TLV_PORT_MODE_40G)) {
                        max_port_mode = TLV_PORT_MODE_40G;
-               } else if (port_modes & (1 << TLV_PORT_MODE_10G_10G_10G_10G)) {
+               } else if (port_modes & (1U << TLV_PORT_MODE_10G_10G_10G_10G)) {
                        max_port_mode = TLV_PORT_MODE_10G_10G_10G_10G;
                } else {
                        /* Assume two 10G ports */
@@ -189,6 +190,9 @@ hunt_board_cfg(
 
        encp->enc_bug61265_workaround = B_FALSE; /* Medford only */
 
+       /* Checksums for TSO sends can be incorrect on Huntington. */
+       encp->enc_bug61297_workaround = B_TRUE;
+
        /* Alignment for receive packet DMA buffers */
        encp->enc_rx_buf_align_start = 1;
        encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */