net/sfc/base: add API to control UDP tunnel ports

[dpdk.git] / drivers / net / sfc / base / siena_impl.h

diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index da03098..2e3d390 100644 (file)
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -40,8 +40,17 @@
 extern "C" {
 #endif
 
+#ifndef EFX_TXQ_DC_SIZE
+#define        EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
+#endif
+#ifndef EFX_RXQ_DC_SIZE
+#define        EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
+#endif
+#define        EFX_TXQ_DC_NDESCS(_dcsize)      (8 << (_dcsize))
+
 #define        SIENA_NVRAM_CHUNK 0x80
 
+
 extern __checkReturn   efx_rc_t
 siena_nic_probe(
        __in            efx_nic_t *enp);
@@ -56,6 +65,15 @@ siena_nic_init(
 
 #if EFSYS_OPT_DIAG
 
+extern efx_sram_pattern_fn_t   __efx_sram_pattern_fns[];
+
+typedef struct siena_register_set_s {
+       unsigned int            address;
+       unsigned int            step;
+       unsigned int            rows;
+       efx_oword_t             mask;
+} siena_register_set_t;
+
 extern __checkReturn   efx_rc_t
 siena_nic_register_test(
        __in            efx_nic_t *enp);
@@ -133,6 +151,170 @@ siena_mcdi_get_timeout(
 
 #endif /* EFSYS_OPT_MCDI */
 
+#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_lock(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_unlock(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __out_opt               uint32_t *verify_resultp);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_get_dynamic_cfg(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __in                    boolean_t vpd,
+       __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
+       __out                   size_t *sizep);
+
+#endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
+
+#if EFSYS_OPT_NVRAM
+
+#if EFSYS_OPT_DIAG
+
+extern __checkReturn           efx_rc_t
+siena_nvram_test(
+       __in                    efx_nic_t *enp);
+
+#endif /* EFSYS_OPT_DIAG */
+
+extern __checkReturn           efx_rc_t
+siena_nvram_get_subtype(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __out                   uint32_t *subtypep);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_type_to_partn(
+       __in                    efx_nic_t *enp,
+       __in                    efx_nvram_type_t type,
+       __out                   uint32_t *partnp);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_size(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __out                   size_t *sizep);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_rw_start(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __out                   size_t *chunk_sizep);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_read(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __in                    unsigned int offset,
+       __out_bcount(size)      caddr_t data,
+       __in                    size_t size);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_erase(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __in                    unsigned int offset,
+       __in                    size_t size);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_write(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __in                    unsigned int offset,
+       __out_bcount(size)      caddr_t data,
+       __in                    size_t size);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_rw_finish(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __out_opt               uint32_t *verify_resultp);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_get_version(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __out                   uint32_t *subtypep,
+       __out_ecount(4)         uint16_t version[4]);
+
+extern __checkReturn           efx_rc_t
+siena_nvram_partn_set_version(
+       __in                    efx_nic_t *enp,
+       __in                    uint32_t partn,
+       __in_ecount(4)          uint16_t version[4]);
+
+#endif /* EFSYS_OPT_NVRAM */
+
+#if EFSYS_OPT_VPD
+
+extern __checkReturn           efx_rc_t
+siena_vpd_init(
+       __in                    efx_nic_t *enp);
+
+extern __checkReturn           efx_rc_t
+siena_vpd_size(
+       __in                    efx_nic_t *enp,
+       __out                   size_t *sizep);
+
+extern __checkReturn           efx_rc_t
+siena_vpd_read(
+       __in                    efx_nic_t *enp,
+       __out_bcount(size)      caddr_t data,
+       __in                    size_t size);
+
+extern __checkReturn           efx_rc_t
+siena_vpd_verify(
+       __in                    efx_nic_t *enp,
+       __in_bcount(size)       caddr_t data,
+       __in                    size_t size);
+
+extern __checkReturn           efx_rc_t
+siena_vpd_reinit(
+       __in                    efx_nic_t *enp,
+       __in_bcount(size)       caddr_t data,
+       __in                    size_t size);
+
+extern __checkReturn           efx_rc_t
+siena_vpd_get(
+       __in                    efx_nic_t *enp,
+       __in_bcount(size)       caddr_t data,
+       __in                    size_t size,
+       __inout                 efx_vpd_value_t *evvp);
+
+extern __checkReturn           efx_rc_t
+siena_vpd_set(
+       __in                    efx_nic_t *enp,
+       __in_bcount(size)       caddr_t data,
+       __in                    size_t size,
+       __in                    efx_vpd_value_t *evvp);
+
+extern __checkReturn           efx_rc_t
+siena_vpd_next(
+       __in                    efx_nic_t *enp,
+       __in_bcount(size)       caddr_t data,
+       __in                    size_t size,
+       __out                   efx_vpd_value_t *evvp,
+       __inout                 unsigned int *contp);
+
+extern __checkReturn           efx_rc_t
+siena_vpd_write(
+       __in                    efx_nic_t *enp,
+       __in_bcount(size)       caddr_t data,
+       __in                    size_t size);
+
+extern                         void
+siena_vpd_fini(
+       __in                    efx_nic_t *enp);
+
+#endif /* EFSYS_OPT_VPD */
+
 typedef struct siena_link_state_s {
        uint32_t                sls_adv_cap_mask;
        uint32_t                sls_lp_cap_mask;