esmp->esm_mz = mz;
esmp->esm_base = mz->addr;
+ sfc_info(sa,
+ "DMA name=%s id=%u len=%lu socket_id=%d => virt=%p iova=%lx",
+ name, id, len, socket_id, esmp->esm_base,
+ (unsigned long)esmp->esm_addr);
+
return 0;
}
MIN(encp->enc_txq_limit,
limits.edl_max_evq_count - 1 - limits.edl_max_rxq_count);
- if (sa->tso)
+ if (sa->tso && encp->enc_fw_assisted_tso_v2_enabled)
limits.edl_max_txq_count =
MIN(limits.edl_max_txq_count,
encp->enc_fw_assisted_tso_v2_n_contexts /
sfc_log_init(sa, "done");
}
+static efx_rc_t
+sfc_find_mem_bar(efsys_pci_config_t *configp, int bar_index,
+ efsys_bar_t *barp)
+{
+ efsys_bar_t result;
+ struct rte_pci_device *dev;
+
+ memset(&result, 0, sizeof(result));
+
+ if (bar_index < 0 || bar_index >= PCI_MAX_RESOURCE)
+ return EINVAL;
+
+ dev = configp->espc_dev;
+
+ result.esb_rid = bar_index;
+ result.esb_dev = dev;
+ result.esb_base = dev->mem_resource[bar_index].addr;
+
+ *barp = result;
+
+ return 0;
+}
+
static int
-sfc_mem_bar_init(struct sfc_adapter *sa, unsigned int membar)
+sfc_mem_bar_init(struct sfc_adapter *sa, const efx_bar_region_t *mem_ebrp)
{
struct rte_eth_dev *eth_dev = sa->eth_dev;
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
efsys_bar_t *ebp = &sa->mem_bar;
- struct rte_mem_resource *res = &pci_dev->mem_resource[membar];
+ struct rte_mem_resource *res =
+ &pci_dev->mem_resource[mem_ebrp->ebr_index];
SFC_BAR_LOCK_INIT(ebp, eth_dev->data->name);
- ebp->esb_rid = membar;
+ ebp->esb_rid = mem_ebrp->ebr_index;
ebp->esb_dev = pci_dev;
ebp->esb_base = res->addr;
+
+ sa->fcw_offset = mem_ebrp->ebr_offset;
+
return 0;
}
encp->enc_tunnel_encapsulations_supported;
if (sfc_dp_tx_offload_capa(sa->priv.dp_tx) & DEV_TX_OFFLOAD_TCP_TSO) {
- sa->tso = encp->enc_fw_assisted_tso_v2_enabled;
+ sa->tso = encp->enc_fw_assisted_tso_v2_enabled ||
+ encp->enc_tso_v3_enabled;
if (!sa->tso)
sfc_info(sa, "TSO support isn't available on this adapter");
}
(sfc_dp_tx_offload_capa(sa->priv.dp_tx) &
(DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
DEV_TX_OFFLOAD_GENEVE_TNL_TSO)) != 0) {
- sa->tso_encap = encp->enc_fw_assisted_tso_v2_encap_enabled;
+ sa->tso_encap = encp->enc_fw_assisted_tso_v2_encap_enabled ||
+ encp->enc_tso_v3_enabled;
if (!sa->tso_encap)
sfc_info(sa, "Encapsulated TSO support isn't available on this adapter");
}
if (rc != 0)
goto fail_filter_attach;
+ rc = sfc_mae_attach(sa);
+ if (rc != 0)
+ goto fail_mae_attach;
+
sfc_log_init(sa, "fini nic");
efx_nic_fini(enp);
fail_sriov_vswitch_create:
sfc_flow_fini(sa);
+ sfc_mae_detach(sa);
+
+fail_mae_attach:
sfc_filter_detach(sa);
fail_filter_attach:
sfc_flow_fini(sa);
+ sfc_mae_detach(sa);
sfc_filter_detach(sa);
sfc_rss_detach(sa);
sfc_port_detach(sa);
return 0;
}
+static efx_rc_t
+sfc_pci_config_readd(efsys_pci_config_t *configp, uint32_t offset,
+ efx_dword_t *edp)
+{
+ int rc;
+
+ rc = rte_pci_read_config(configp->espc_dev, edp->ed_u32, sizeof(*edp),
+ offset);
+
+ return (rc < 0 || rc != sizeof(*edp)) ? EIO : 0;
+}
+
+static int
+sfc_family(struct sfc_adapter *sa, efx_bar_region_t *mem_ebrp)
+{
+ struct rte_eth_dev *eth_dev = sa->eth_dev;
+ struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+ efsys_pci_config_t espcp;
+ static const efx_pci_ops_t ops = {
+ .epo_config_readd = sfc_pci_config_readd,
+ .epo_find_mem_bar = sfc_find_mem_bar,
+ };
+ int rc;
+
+ espcp.espc_dev = pci_dev;
+
+ rc = efx_family_probe_bar(pci_dev->id.vendor_id,
+ pci_dev->id.device_id,
+ &espcp, &ops, &sa->family, mem_ebrp);
+
+ return rc;
+}
+
int
sfc_probe(struct sfc_adapter *sa)
{
- struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev);
- unsigned int membar;
+ efx_bar_region_t mem_ebrp;
efx_nic_t *enp;
int rc;
rte_atomic32_init(&sa->restart_required);
sfc_log_init(sa, "get family");
- rc = efx_family(pci_dev->id.vendor_id, pci_dev->id.device_id,
- &sa->family, &membar);
+ rc = sfc_family(sa, &mem_ebrp);
if (rc != 0)
goto fail_family;
- sfc_log_init(sa, "family is %u, membar is %u", sa->family, membar);
+ sfc_log_init(sa,
+ "family is %u, membar is %u, function control window offset is %lu",
+ sa->family, mem_ebrp.ebr_index, mem_ebrp.ebr_offset);
sfc_log_init(sa, "init mem bar");
- rc = sfc_mem_bar_init(sa, membar);
+ rc = sfc_mem_bar_init(sa, &mem_ebrp);
if (rc != 0)
goto fail_mem_bar_init;
sfc_log_init(sa, "create nic");
rte_spinlock_init(&sa->nic_lock);
rc = efx_nic_create(sa->family, (efsys_identifier_t *)sa,
- &sa->mem_bar, 0,
+ &sa->mem_bar, mem_ebrp.ebr_offset,
&sa->nic_lock, &enp);
if (rc != 0)
goto fail_nic_create;
return ret;
}
+
+struct sfc_hw_switch_id {
+ char board_sn[RTE_SIZEOF_FIELD(efx_nic_board_info_t, enbi_serial)];
+};
+
+int
+sfc_hw_switch_id_init(struct sfc_adapter *sa,
+ struct sfc_hw_switch_id **idp)
+{
+ efx_nic_board_info_t board_info;
+ struct sfc_hw_switch_id *id;
+ int rc;
+
+ if (idp == NULL)
+ return EINVAL;
+
+ id = rte_zmalloc("sfc_hw_switch_id", sizeof(*id), 0);
+ if (id == NULL)
+ return ENOMEM;
+
+ rc = efx_nic_get_board_info(sa->nic, &board_info);
+ if (rc != 0)
+ return rc;
+
+ memcpy(id->board_sn, board_info.enbi_serial, sizeof(id->board_sn));
+
+ *idp = id;
+
+ return 0;
+}
+
+void
+sfc_hw_switch_id_fini(__rte_unused struct sfc_adapter *sa,
+ struct sfc_hw_switch_id *id)
+{
+ rte_free(id);
+}
+
+bool
+sfc_hw_switch_ids_equal(const struct sfc_hw_switch_id *left,
+ const struct sfc_hw_switch_id *right)
+{
+ return strncmp(left->board_sn, right->board_sn,
+ sizeof(left->board_sn)) == 0;
+}
git.droids-corp.org / dpdk.git / blobdiff