/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
* Copyright(c) 2017-2019 Solarflare Communications Inc.
*
* This software was jointly developed between OKTET Labs (under contract
/** Datapath queue run-time information */
struct sfc_dp_queue {
+ /*
+ * Typically the structure is located at the end of Rx/Tx queue
+ * data structure and not used on datapath. So, it is not a
+ * problem to have extra fields even if not used. However,
+ * put stats at top of the structure to be closer to fields
+ * used on datapath or reap to have more chances to be cache-hot.
+ */
+ uint32_t rx_dbells;
+ uint32_t tx_dbells;
+
uint16_t port_id;
uint16_t queue_id;
struct rte_pci_addr pci_addr;
uint16_t port_id, uint16_t queue_id,
const struct rte_pci_addr *pci_addr);
+/* Maximum datapath log level to be included in build. */
+#ifndef SFC_DP_LOG_LEVEL
+#define SFC_DP_LOG_LEVEL RTE_LOG_NOTICE
+#endif
+
/*
* Helper macro to define datapath logging macros and have uniform
* logging.
const struct sfc_dp_queue *_dpq = (dpq); \
const struct rte_pci_addr *_addr = &(_dpq)->pci_addr; \
\
+ if (RTE_LOG_ ## level > SFC_DP_LOG_LEVEL) \
+ break; \
SFC_GENERIC_LOG(level, \
RTE_FMT("%s " PCI_PRI_FMT \
" #%" PRIu16 ".%" PRIu16 ": " \
/** List of datapath variants */
TAILQ_HEAD(sfc_dp_list, sfc_dp);
+typedef unsigned int sfc_sw_index_t;
+#define SFC_SW_INDEX_INVALID ((sfc_sw_index_t)(UINT_MAX))
+
+typedef int32_t sfc_ethdev_qid_t;
+#define SFC_ETHDEV_QID_INVALID ((sfc_ethdev_qid_t)(-1))
+
/* Check if available HW/FW capabilities are sufficient for the datapath */
static inline bool
sfc_dp_match_hw_fw_caps(const struct sfc_dp *dp, unsigned int avail_caps)