net/mlx5: fix flow age event triggering

[dpdk.git] / drivers / net / sfc / sfc_ef100_rx.c

diff --git a/drivers/net/sfc/sfc_ef100_rx.c b/drivers/net/sfc/sfc_ef100_rx.c
index 5e76160..07b37ff 100644 (file)
--- a/drivers/net/sfc/sfc_ef100_rx.c
+++ b/drivers/net/sfc/sfc_ef100_rx.c
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
  * Copyright(c) 2018-2019 Solarflare Communications Inc.
  *
  * This software was jointly developed between OKTET Labs (under contract
@@ -168,7 +168,7 @@ sfc_ef100_rx_qrefill(struct sfc_ef100_rxq *rxq)
                        struct sfc_ef100_rx_sw_desc *rxd;
                        rte_iova_t phys_addr;
 
-                       MBUF_RAW_ALLOC_CHECK(m);
+                       __rte_mbuf_raw_sanity_check(m);
 
                        SFC_ASSERT((id & ~ptr_mask) == 0);
                        rxd = &rxq->sw_ring[id];
@@ -305,7 +305,7 @@ sfc_ef100_rx_class_decode(const efx_word_t class, uint64_t *ol_flags)
                        break;
                case ESE_GZ_RH_HCLASS_L3_CLASS_IP4BAD:
                        ptype |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
-                       *ol_flags |= PKT_RX_EIP_CKSUM_BAD;
+                       *ol_flags |= PKT_RX_OUTER_IP_CKSUM_BAD;
                        break;
                case ESE_GZ_RH_HCLASS_L3_CLASS_IP6:
                        ptype |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
@@ -481,7 +481,7 @@ sfc_ef100_rx_process_ready_pkts(struct sfc_ef100_rxq *rxq,
                rxq->ready_pkts--;
 
                pkt = sfc_ef100_rx_next_mbuf(rxq);
-               MBUF_RAW_ALLOC_CHECK(pkt);
+               __rte_mbuf_raw_sanity_check(pkt);
 
                RTE_BUILD_BUG_ON(sizeof(pkt->rearm_data[0]) !=
                                 sizeof(rxq->rearm_data));
@@ -505,7 +505,7 @@ sfc_ef100_rx_process_ready_pkts(struct sfc_ef100_rxq *rxq,
                        struct rte_mbuf *seg;
 
                        seg = sfc_ef100_rx_next_mbuf(rxq);
-                       MBUF_RAW_ALLOC_CHECK(seg);
+                       __rte_mbuf_raw_sanity_check(seg);
 
                        seg->data_off = RTE_PKTMBUF_HEADROOM;