net/enic: avoid error message when no advanced filtering
[dpdk.git] / drivers / net / sfc / sfc_ef10_essb_rx.c
index 17e4c14..67db837 100644 (file)
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
  * Copyright(c) 2017-2019 Solarflare Communications Inc.
  *
  * This software was jointly developed between OKTET Labs (under contract
@@ -47,7 +47,7 @@
  * Each HW Rx descriptor has many Rx buffers. The number of buffers
  * in one HW Rx descriptor is equal to size of contiguous block
  * provided by Rx buffers memory pool. The contiguous block size
- * depends on CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB and rte_mbuf
+ * depends on RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB and rte_mbuf
  * data size specified on the memory pool creation. Typical rte_mbuf
  * data size is about 2k which makes a bit less than 32 buffers in
  * contiguous block with default bucket size equal to 64k.
@@ -125,7 +125,7 @@ sfc_ef10_essb_next_mbuf(const struct sfc_ef10_essb_rxq *rxq,
        struct rte_mbuf *m;
 
        m = (struct rte_mbuf *)((uintptr_t)mbuf + rxq->buf_stride);
-       MBUF_RAW_ALLOC_CHECK(m);
+       __rte_mbuf_raw_sanity_check(m);
        return m;
 }
 
@@ -136,7 +136,7 @@ sfc_ef10_essb_mbuf_by_index(const struct sfc_ef10_essb_rxq *rxq,
        struct rte_mbuf *m;
 
        m = (struct rte_mbuf *)((uintptr_t)mbuf + idx * rxq->buf_stride);
-       MBUF_RAW_ALLOC_CHECK(m);
+       __rte_mbuf_raw_sanity_check(m);
        return m;
 }
 
@@ -220,7 +220,8 @@ sfc_ef10_essb_rx_qrefill(struct sfc_ef10_essb_rxq *rxq)
 
        SFC_ASSERT(rxq->added != added);
        rxq->added = added;
-       sfc_ef10_rx_qpush(rxq->doorbell, added, rxq_ptr_mask);
+       sfc_ef10_rx_qpush(rxq->doorbell, added, rxq_ptr_mask,
+                         &rxq->dp.dpq.rx_dbells);
 }
 
 static bool
@@ -373,13 +374,13 @@ sfc_ef10_essb_rx_get_pending(struct sfc_ef10_essb_rxq *rxq,
                        rte_pktmbuf_data_len(m) = pkt_len;
 
                        m->ol_flags |=
-                               (PKT_RX_RSS_HASH *
+                               (RTE_MBUF_F_RX_RSS_HASH *
                                 !!EFX_TEST_QWORD_BIT(*qwordp,
                                        ES_EZ_ESSB_RX_PREFIX_HASH_VALID_LBN)) |
-                               (PKT_RX_FDIR_ID *
+                               (RTE_MBUF_F_RX_FDIR_ID *
                                 !!EFX_TEST_QWORD_BIT(*qwordp,
                                        ES_EZ_ESSB_RX_PREFIX_MARK_VALID_LBN)) |
-                               (PKT_RX_FDIR *
+                               (RTE_MBUF_F_RX_FDIR *
                                 !!EFX_TEST_QWORD_BIT(*qwordp,
                                        ES_EZ_ESSB_RX_PREFIX_MATCH_FLAG_LBN));
 
@@ -745,8 +746,8 @@ struct sfc_dp_rx sfc_ef10_essb_rx = {
        },
        .features               = SFC_DP_RX_FEAT_FLOW_FLAG |
                                  SFC_DP_RX_FEAT_FLOW_MARK,
-       .dev_offload_capa       = DEV_RX_OFFLOAD_CHECKSUM |
-                                 DEV_RX_OFFLOAD_RSS_HASH,
+       .dev_offload_capa       = RTE_ETH_RX_OFFLOAD_CHECKSUM |
+                                 RTE_ETH_RX_OFFLOAD_RSS_HASH,
        .queue_offload_capa     = 0,
        .get_dev_info           = sfc_ef10_essb_rx_get_dev_info,
        .pool_ops_supported     = sfc_ef10_essb_rx_pool_ops_supported,