net/sfc: make refill threshold check Rx datapath specific
[dpdk.git] / drivers / net / sfc / sfc_ef10_rx.c
index 2a3bf89..192cfb4 100644 (file)
@@ -177,7 +177,7 @@ sfc_ef10_rx_qrefill(struct sfc_ef10_rxq *rxq)
                     ++i, ++id) {
                        struct rte_mbuf *m = objs[i];
                        struct sfc_ef10_rx_sw_desc *rxd;
-                       phys_addr_t phys_addr;
+                       rte_iova_t phys_addr;
 
                        SFC_ASSERT((id & ~ptr_mask) == 0);
                        rxd = &rxq->sw_ring[id];
@@ -189,7 +189,7 @@ sfc_ef10_rx_qrefill(struct sfc_ef10_rxq *rxq)
                         * structure members.
                         */
 
-                       phys_addr = rte_mbuf_data_dma_addr_default(m);
+                       phys_addr = rte_mbuf_data_iova_default(m);
                        EFX_POPULATE_QWORD_2(rxq->rxq_hw_ring[id],
                            ESF_DZ_RX_KER_BYTE_CNT, buf_size,
                            ESF_DZ_RX_KER_BUF_ADDR, phys_addr);
@@ -251,6 +251,11 @@ static void
 sfc_ef10_rx_ev_to_offloads(struct sfc_ef10_rxq *rxq, const efx_qword_t rx_ev,
                           struct rte_mbuf *m)
 {
+       uint32_t tun_ptype = 0;
+       /* Which event bit is mapped to PKT_RX_IP_CKSUM_* */
+       int8_t ip_csum_err_bit;
+       /* Which event bit is mapped to PKT_RX_L4_CKSUM_* */
+       int8_t l4_csum_err_bit;
        uint32_t l2_ptype = 0;
        uint32_t l3_ptype = 0;
        uint32_t l4_ptype = 0;
@@ -259,15 +264,51 @@ sfc_ef10_rx_ev_to_offloads(struct sfc_ef10_rxq *rxq, const efx_qword_t rx_ev,
        if (unlikely(EFX_TEST_QWORD_BIT(rx_ev, ESF_DZ_RX_PARSE_INCOMPLETE_LBN)))
                goto done;
 
+       switch (EFX_QWORD_FIELD(rx_ev, ESF_EZ_RX_ENCAP_HDR)) {
+       default:
+               /* Unexpected encapsulation tag class */
+               SFC_ASSERT(false);
+               /* FALLTHROUGH */
+       case ESE_EZ_ENCAP_HDR_NONE:
+               break;
+       case ESE_EZ_ENCAP_HDR_VXLAN:
+               /*
+                * It is definitely UDP, but we have no information
+                * about IPv4 vs IPv6 and VLAN tagging.
+                */
+               tun_ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP;
+               break;
+       case ESE_EZ_ENCAP_HDR_GRE:
+               /*
+                * We have no information about IPv4 vs IPv6 and VLAN tagging.
+                */
+               tun_ptype = RTE_PTYPE_TUNNEL_NVGRE;
+               break;
+       }
+
+       if (tun_ptype == 0) {
+               ip_csum_err_bit = ESF_DZ_RX_IPCKSUM_ERR_LBN;
+               l4_csum_err_bit = ESF_DZ_RX_TCPUDP_CKSUM_ERR_LBN;
+       } else {
+               ip_csum_err_bit = ESF_EZ_RX_IP_INNER_CHKSUM_ERR_LBN;
+               l4_csum_err_bit = ESF_EZ_RX_TCP_UDP_INNER_CHKSUM_ERR_LBN;
+               if (unlikely(EFX_TEST_QWORD_BIT(rx_ev,
+                                               ESF_DZ_RX_IPCKSUM_ERR_LBN)))
+                       ol_flags |= PKT_RX_EIP_CKSUM_BAD;
+       }
+
        switch (EFX_QWORD_FIELD(rx_ev, ESF_DZ_RX_ETH_TAG_CLASS)) {
        case ESE_DZ_ETH_TAG_CLASS_NONE:
-               l2_ptype = RTE_PTYPE_L2_ETHER;
+               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER :
+                       RTE_PTYPE_INNER_L2_ETHER;
                break;
        case ESE_DZ_ETH_TAG_CLASS_VLAN1:
-               l2_ptype = RTE_PTYPE_L2_ETHER_VLAN;
+               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER_VLAN :
+                       RTE_PTYPE_INNER_L2_ETHER_VLAN;
                break;
        case ESE_DZ_ETH_TAG_CLASS_VLAN2:
-               l2_ptype = RTE_PTYPE_L2_ETHER_QINQ;
+               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER_QINQ :
+                       RTE_PTYPE_INNER_L2_ETHER_QINQ;
                break;
        default:
                /* Unexpected Eth tag class */
@@ -276,25 +317,30 @@ sfc_ef10_rx_ev_to_offloads(struct sfc_ef10_rxq *rxq, const efx_qword_t rx_ev,
 
        switch (EFX_QWORD_FIELD(rx_ev, ESF_DZ_RX_L3_CLASS)) {
        case ESE_DZ_L3_CLASS_IP4_FRAG:
-               l4_ptype = RTE_PTYPE_L4_FRAG;
+               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_FRAG :
+                       RTE_PTYPE_INNER_L4_FRAG;
                /* FALLTHROUGH */
        case ESE_DZ_L3_CLASS_IP4:
-               l3_ptype = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
+               l3_ptype = (tun_ptype == 0) ? RTE_PTYPE_L3_IPV4_EXT_UNKNOWN :
+                       RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
                ol_flags |= PKT_RX_RSS_HASH |
-                       ((EFX_TEST_QWORD_BIT(rx_ev,
-                                            ESF_DZ_RX_IPCKSUM_ERR_LBN)) ?
+                       ((EFX_TEST_QWORD_BIT(rx_ev, ip_csum_err_bit)) ?
                         PKT_RX_IP_CKSUM_BAD : PKT_RX_IP_CKSUM_GOOD);
                break;
        case ESE_DZ_L3_CLASS_IP6_FRAG:
-               l4_ptype |= RTE_PTYPE_L4_FRAG;
+               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_FRAG :
+                       RTE_PTYPE_INNER_L4_FRAG;
                /* FALLTHROUGH */
        case ESE_DZ_L3_CLASS_IP6:
-               l3_ptype |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
+               l3_ptype = (tun_ptype == 0) ? RTE_PTYPE_L3_IPV6_EXT_UNKNOWN :
+                       RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
                ol_flags |= PKT_RX_RSS_HASH;
                break;
        case ESE_DZ_L3_CLASS_ARP:
                /* Override Layer 2 packet type */
-               l2_ptype = RTE_PTYPE_L2_ETHER_ARP;
+               /* There is no ARP classification for inner packets */
+               if (tun_ptype == 0)
+                       l2_ptype = RTE_PTYPE_L2_ETHER_ARP;
                break;
        default:
                /* Unexpected Layer 3 class */
@@ -303,17 +349,17 @@ sfc_ef10_rx_ev_to_offloads(struct sfc_ef10_rxq *rxq, const efx_qword_t rx_ev,
 
        switch (EFX_QWORD_FIELD(rx_ev, ESF_DZ_RX_L4_CLASS)) {
        case ESE_DZ_L4_CLASS_TCP:
-               l4_ptype = RTE_PTYPE_L4_TCP;
+               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_TCP :
+                       RTE_PTYPE_INNER_L4_TCP;
                ol_flags |=
-                       (EFX_TEST_QWORD_BIT(rx_ev,
-                                           ESF_DZ_RX_TCPUDP_CKSUM_ERR_LBN)) ?
+                       (EFX_TEST_QWORD_BIT(rx_ev, l4_csum_err_bit)) ?
                        PKT_RX_L4_CKSUM_BAD : PKT_RX_L4_CKSUM_GOOD;
                break;
        case ESE_DZ_L4_CLASS_UDP:
-               l4_ptype = RTE_PTYPE_L4_UDP;
+               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_UDP :
+                       RTE_PTYPE_INNER_L4_UDP;
                ol_flags |=
-                       (EFX_TEST_QWORD_BIT(rx_ev,
-                                           ESF_DZ_RX_TCPUDP_CKSUM_ERR_LBN)) ?
+                       (EFX_TEST_QWORD_BIT(rx_ev, l4_csum_err_bit)) ?
                        PKT_RX_L4_CKSUM_BAD : PKT_RX_L4_CKSUM_GOOD;
                break;
        case ESE_DZ_L4_CLASS_UNKNOWN:
@@ -329,7 +375,7 @@ sfc_ef10_rx_ev_to_offloads(struct sfc_ef10_rxq *rxq, const efx_qword_t rx_ev,
 
 done:
        m->ol_flags = ol_flags;
-       m->packet_type = l2_ptype | l3_ptype | l4_ptype;
+       m->packet_type = tun_ptype | l2_ptype | l3_ptype | l4_ptype;
 }
 
 static uint16_t
@@ -386,9 +432,8 @@ sfc_ef10_rx_process_event(struct sfc_ef10_rxq *rxq, efx_qword_t rx_ev,
 
        *rx_pkts++ = m;
 
-       *(uint64_t *)(&m->rearm_data) = rxq->rearm_data;
-       /* rearm_data rewrites ol_flags which is updated below */
-       rte_compiler_barrier();
+       RTE_BUILD_BUG_ON(sizeof(m->rearm_data[0]) != sizeof(rxq->rearm_data));
+       m->rearm_data[0] = rxq->rearm_data;
 
        /* Classify packet based on Rx event */
        sfc_ef10_rx_ev_to_offloads(rxq, rx_ev, m);
@@ -412,7 +457,7 @@ sfc_ef10_rx_process_event(struct sfc_ef10_rxq *rxq, efx_qword_t rx_ev,
        rte_pktmbuf_data_len(m) = pkt_len;
        rte_pktmbuf_pkt_len(m) = pkt_len;
 
-       m->next = NULL;
+       SFC_ASSERT(m->next == NULL);
 
        /* Remember mbuf to copy offload flags and packet type from */
        m0 = m;
@@ -426,9 +471,9 @@ sfc_ef10_rx_process_event(struct sfc_ef10_rxq *rxq, efx_qword_t rx_ev,
                if (ready > rxq->prepared)
                        *rx_pkts++ = m;
 
-               *(uint64_t *)(&m->rearm_data) = rxq->rearm_data;
-               /* rearm_data rewrites ol_flags which is updated below */
-               rte_compiler_barrier();
+               RTE_BUILD_BUG_ON(sizeof(m->rearm_data[0]) !=
+                                sizeof(rxq->rearm_data));
+               m->rearm_data[0] = rxq->rearm_data;
 
                /* Event-dependent information is the same */
                m->ol_flags = m0->ol_flags;
@@ -449,7 +494,7 @@ sfc_ef10_rx_process_event(struct sfc_ef10_rxq *rxq, efx_qword_t rx_ev,
                rte_pktmbuf_data_len(m) = pkt_len;
                rte_pktmbuf_pkt_len(m) = pkt_len;
 
-               m->next = NULL;
+               SFC_ASSERT(m->next == NULL);
        }
 
        return n_rx_pkts;
@@ -516,7 +561,7 @@ sfc_ef10_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 }
 
 static const uint32_t *
-sfc_ef10_supported_ptypes_get(void)
+sfc_ef10_supported_ptypes_get(uint32_t tunnel_encaps)
 {
        static const uint32_t ef10_native_ptypes[] = {
                RTE_PTYPE_L2_ETHER,
@@ -530,8 +575,47 @@ sfc_ef10_supported_ptypes_get(void)
                RTE_PTYPE_L4_UDP,
                RTE_PTYPE_UNKNOWN
        };
+       static const uint32_t ef10_overlay_ptypes[] = {
+               RTE_PTYPE_L2_ETHER,
+               RTE_PTYPE_L2_ETHER_ARP,
+               RTE_PTYPE_L2_ETHER_VLAN,
+               RTE_PTYPE_L2_ETHER_QINQ,
+               RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
+               RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
+               RTE_PTYPE_L4_FRAG,
+               RTE_PTYPE_L4_TCP,
+               RTE_PTYPE_L4_UDP,
+               RTE_PTYPE_TUNNEL_VXLAN,
+               RTE_PTYPE_TUNNEL_NVGRE,
+               RTE_PTYPE_INNER_L2_ETHER,
+               RTE_PTYPE_INNER_L2_ETHER_VLAN,
+               RTE_PTYPE_INNER_L2_ETHER_QINQ,
+               RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
+               RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
+               RTE_PTYPE_INNER_L4_FRAG,
+               RTE_PTYPE_INNER_L4_TCP,
+               RTE_PTYPE_INNER_L4_UDP,
+               RTE_PTYPE_UNKNOWN
+       };
 
-       return ef10_native_ptypes;
+       /*
+        * The function returns static set of supported packet types,
+        * so we can't build it dynamically based on supported tunnel
+        * encapsulations and should limit to known sets.
+        */
+       switch (tunnel_encaps) {
+       case (1u << EFX_TUNNEL_PROTOCOL_VXLAN |
+             1u << EFX_TUNNEL_PROTOCOL_GENEVE |
+             1u << EFX_TUNNEL_PROTOCOL_NVGRE):
+               return ef10_overlay_ptypes;
+       default:
+               RTE_LOG(ERR, PMD,
+                       "Unexpected set of supported tunnel encapsulations: %#x\n",
+                       tunnel_encaps);
+               /* FALLTHROUGH */
+       case 0:
+               return ef10_native_ptypes;
+       }
 }
 
 static sfc_dp_rx_qdesc_npending_t sfc_ef10_rx_qdesc_npending;
@@ -545,6 +629,28 @@ sfc_ef10_rx_qdesc_npending(__rte_unused struct sfc_dp_rxq *dp_rxq)
        return -ENOTSUP;
 }
 
+static sfc_dp_rx_qdesc_status_t sfc_ef10_rx_qdesc_status;
+static int
+sfc_ef10_rx_qdesc_status(__rte_unused struct sfc_dp_rxq *dp_rxq,
+                        __rte_unused uint16_t offset)
+{
+       return -ENOTSUP;
+}
+
+
+static sfc_dp_rx_qsize_up_rings_t sfc_ef10_rx_qsize_up_rings;
+static int
+sfc_ef10_rx_qsize_up_rings(uint16_t nb_rx_desc,
+                          unsigned int *rxq_entries,
+                          unsigned int *evq_entries,
+                          unsigned int *rxq_max_fill_level)
+{
+       *rxq_entries = nb_rx_desc;
+       *evq_entries = nb_rx_desc;
+       *rxq_max_fill_level = SFC_EF10_RXQ_LIMIT(*rxq_entries);
+       return 0;
+}
+
 
 static uint64_t
 sfc_ef10_mk_mbuf_rearm_data(uint16_t port_id, uint16_t prefix_size)
@@ -560,7 +666,8 @@ sfc_ef10_mk_mbuf_rearm_data(uint16_t port_id, uint16_t prefix_size)
 
        /* rearm_data covers structure members filled in above */
        rte_compiler_barrier();
-       return *(uint64_t *)(&m.rearm_data);
+       RTE_BUILD_BUG_ON(sizeof(m.rearm_data[0]) != sizeof(uint64_t));
+       return m.rearm_data[0];
 }
 
 static sfc_dp_rx_qcreate_t sfc_ef10_rx_qcreate;
@@ -699,7 +806,9 @@ struct sfc_dp_rx sfc_ef10_rx = {
                .type           = SFC_DP_RX,
                .hw_fw_caps     = SFC_DP_HW_FW_CAP_EF10,
        },
-       .features               = 0,
+       .features               = SFC_DP_RX_FEAT_MULTI_PROCESS |
+                                 SFC_DP_RX_FEAT_TUNNELS,
+       .qsize_up_rings         = sfc_ef10_rx_qsize_up_rings,
        .qcreate                = sfc_ef10_rx_qcreate,
        .qdestroy               = sfc_ef10_rx_qdestroy,
        .qstart                 = sfc_ef10_rx_qstart,
@@ -708,5 +817,6 @@ struct sfc_dp_rx sfc_ef10_rx = {
        .qpurge                 = sfc_ef10_rx_qpurge,
        .supported_ptypes_get   = sfc_ef10_supported_ptypes_get,
        .qdesc_npending         = sfc_ef10_rx_qdesc_npending,
+       .qdesc_status           = sfc_ef10_rx_qdesc_status,
        .pkt_burst              = sfc_ef10_recv_pkts,
 };