/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright (c) 2016-2018 Solarflare Communications Inc.
- * All rights reserved.
+ * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2016-2019 Solarflare Communications Inc.
*
* This software was jointly developed between OKTET Labs (under contract
* for Solarflare) and Solarflare Communications, Inc.
#include "efx_regs.h"
#include "efx_regs_ef10.h"
+#include "sfc_debug.h"
#include "sfc_dp_tx.h"
#include "sfc_tweak.h"
#include "sfc_kvargs.h"
#define sfc_ef10_tx_err(dpq, ...) \
SFC_DP_LOG(SFC_KVARG_DATAPATH_EF10, ERR, dpq, __VA_ARGS__)
+#define sfc_ef10_tx_info(dpq, ...) \
+ SFC_DP_LOG(SFC_KVARG_DATAPATH_EF10, INFO, dpq, __VA_ARGS__)
+
/** Maximum length of the DMA descriptor data */
#define SFC_EF10_TX_DMA_DESC_LEN_MAX \
((1u << ESF_DZ_TX_KER_BYTE_CNT_WIDTH) - 1)
*/
rte_io_wmb();
- *(volatile __m128i *)txq->doorbell = oword.eo_u128[0];
+ *(volatile efsys_uint128_t *)txq->doorbell = oword.eo_u128[0];
}
static unsigned int
}
}
#endif
- ret = sfc_dp_tx_prepare_pkt(m,
+ ret = sfc_dp_tx_prepare_pkt(m, 0, SFC_TSOH_STD_LEN,
txq->tso_tcp_header_offset_limit,
txq->max_fill_level,
SFC_EF10_TSO_OPT_DESCS_NUM, 0);
unsigned int *added, unsigned int *dma_desc_space,
bool *reap_done)
{
- size_t iph_off = m_seg->l2_len;
- size_t tcph_off = m_seg->l2_len + m_seg->l3_len;
- size_t header_len = m_seg->l2_len + m_seg->l3_len + m_seg->l4_len;
+ size_t iph_off = ((m_seg->ol_flags & PKT_TX_TUNNEL_MASK) ?
+ m_seg->outer_l2_len + m_seg->outer_l3_len : 0) +
+ m_seg->l2_len;
+ size_t tcph_off = iph_off + m_seg->l3_len;
+ size_t header_len = tcph_off + m_seg->l4_len;
/* Offset of the payload in the last segment that contains the header */
size_t in_off = 0;
- const struct tcp_hdr *th;
+ const struct rte_tcp_hdr *th;
uint16_t packet_id = 0;
+ uint16_t outer_packet_id = 0;
uint32_t sent_seq;
uint8_t *hdr_addr;
rte_iova_t hdr_iova;
/*
* Discard a packet if header linearization is needed but
* the header is too big.
+ * Duplicate Tx prepare check here to avoid spoil of
+ * memory if Tx prepare is skipped.
*/
if (unlikely(header_len > SFC_TSOH_STD_LEN))
return EMSGSIZE;
needed_desc--;
}
+ /*
+ * 8000-series EF10 hardware requires that innermost IP length
+ * be greater than or equal to the value which each segment is
+ * supposed to have; otherwise, TCP checksum will be incorrect.
+ *
+ * The same concern applies to outer UDP datagram length field.
+ */
+ switch (m_seg->ol_flags & PKT_TX_TUNNEL_MASK) {
+ case PKT_TX_TUNNEL_VXLAN:
+ /* FALLTHROUGH */
+ case PKT_TX_TUNNEL_GENEVE:
+ sfc_tso_outer_udp_fix_len(first_m_seg, hdr_addr);
+ break;
+ default:
+ break;
+ }
+
+ sfc_tso_innermost_ip_fix_len(first_m_seg, hdr_addr, iph_off);
+
/*
* Tx prepare has debug-only checks that offload flags are correctly
* filled in in TSO mbuf. Use zero IPID if there is no IPv4 flag.
* If the packet is still IPv4, HW will simply start from zero IPID.
*/
- if (first_m_seg->ol_flags & PKT_TX_IPV4) {
- const struct ipv4_hdr *iphe4;
+ if (first_m_seg->ol_flags & PKT_TX_IPV4)
+ packet_id = sfc_tso_ip4_get_ipid(hdr_addr, iph_off);
- iphe4 = (const struct ipv4_hdr *)(hdr_addr + iph_off);
- rte_memcpy(&packet_id, &iphe4->packet_id, sizeof(uint16_t));
- packet_id = rte_be_to_cpu_16(packet_id);
- }
+ if (first_m_seg->ol_flags & PKT_TX_OUTER_IPV4)
+ outer_packet_id = sfc_tso_ip4_get_ipid(hdr_addr,
+ first_m_seg->outer_l2_len);
- th = (const struct tcp_hdr *)(hdr_addr + tcph_off);
+ th = (const struct rte_tcp_hdr *)(hdr_addr + tcph_off);
rte_memcpy(&sent_seq, &th->sent_seq, sizeof(uint32_t));
sent_seq = rte_be_to_cpu_32(sent_seq);
- sfc_ef10_tx_qdesc_tso2_create(txq, *added, packet_id, 0, sent_seq,
- first_m_seg->tso_segsz);
+ sfc_ef10_tx_qdesc_tso2_create(txq, *added, packet_id, outer_packet_id,
+ sent_seq, first_m_seg->tso_segsz);
(*added) += SFC_EF10_TSO_OPT_DESCS_NUM;
sfc_ef10_tx_qdesc_dma_create(hdr_iova, header_len, false,
if (txq->sw_ring == NULL)
goto fail_sw_ring_alloc;
- if (info->offloads & DEV_TX_OFFLOAD_TCP_TSO) {
+ if (info->offloads & (DEV_TX_OFFLOAD_TCP_TSO |
+ DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
+ DEV_TX_OFFLOAD_GENEVE_TNL_TSO)) {
txq->tsoh = rte_calloc_socket("sfc-ef10-txq-tsoh",
info->txq_entries,
SFC_TSOH_STD_LEN,
txq->evq_hw_ring = info->evq_hw_ring;
txq->tso_tcp_header_offset_limit = info->tso_tcp_header_offset_limit;
+ sfc_ef10_tx_info(&txq->dp.dpq, "TxQ doorbell is %p", txq->doorbell);
+
*dp_txqp = &txq->dp;
return 0;
.type = SFC_DP_TX,
.hw_fw_caps = SFC_DP_HW_FW_CAP_EF10,
},
- .features = SFC_DP_TX_FEAT_TSO |
- SFC_DP_TX_FEAT_MULTI_SEG |
- SFC_DP_TX_FEAT_MULTI_POOL |
- SFC_DP_TX_FEAT_REFCNT |
- SFC_DP_TX_FEAT_MULTI_PROCESS,
+ .features = SFC_DP_TX_FEAT_MULTI_PROCESS,
+ .dev_offload_capa = DEV_TX_OFFLOAD_MULTI_SEGS,
+ .queue_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
+ DEV_TX_OFFLOAD_UDP_CKSUM |
+ DEV_TX_OFFLOAD_TCP_CKSUM |
+ DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
+ DEV_TX_OFFLOAD_TCP_TSO |
+ DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
+ DEV_TX_OFFLOAD_GENEVE_TNL_TSO,
.get_dev_info = sfc_ef10_get_dev_info,
.qsize_up_rings = sfc_ef10_tx_qsize_up_rings,
.qcreate = sfc_ef10_tx_qcreate,
.type = SFC_DP_TX,
},
.features = SFC_DP_TX_FEAT_MULTI_PROCESS,
+ .dev_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE,
+ .queue_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
+ DEV_TX_OFFLOAD_UDP_CKSUM |
+ DEV_TX_OFFLOAD_TCP_CKSUM |
+ DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM,
.get_dev_info = sfc_ef10_get_dev_info,
.qsize_up_rings = sfc_ef10_tx_qsize_up_rings,
.qcreate = sfc_ef10_tx_qcreate,