net/hns3: support SVE Rx
[dpdk.git] / drivers / net / sfc / sfc_ethdev.c
index f682843..165776b 100644 (file)
@@ -102,6 +102,8 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 
        dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
 
+       dev_info->max_vfs = sa->sriov.num_vfs;
+
        /* Autonegotiation may be disabled */
        dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
        if (sa->port.phy_adv_cap_mask & (1u << EFX_PHY_CAP_1000FDX))
@@ -318,6 +320,17 @@ sfc_dev_set_link_down(struct rte_eth_dev *dev)
        return 0;
 }
 
+static void
+sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev)
+{
+       free(dev->process_private);
+       dev->process_private = NULL;
+       dev->dev_ops = NULL;
+       dev->tx_pkt_prepare = NULL;
+       dev->tx_pkt_burst = NULL;
+       dev->rx_pkt_burst = NULL;
+}
+
 static int
 sfc_dev_close(struct rte_eth_dev *dev)
 {
@@ -325,6 +338,11 @@ sfc_dev_close(struct rte_eth_dev *dev)
 
        sfc_log_init(sa, "entry");
 
+       if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+               sfc_eth_dev_secondary_clear_ops(dev);
+               return 0;
+       }
+
        sfc_adapter_lock(sa);
        switch (sa->state) {
        case SFC_ADAPTER_STARTED:
@@ -936,7 +954,8 @@ sfc_check_scatter_on_all_rx_queues(struct sfc_adapter *sa, size_t pdu)
 
                if (!sfc_rx_check_scatter(pdu, sa->rxq_ctrl[i].buf_size,
                                          encp->enc_rx_prefix_size,
-                                         scatter_enabled, &error)) {
+                                         scatter_enabled,
+                                         encp->enc_rx_scatter_max, &error)) {
                        sfc_err(sa, "MTU check for RxQ %u failed: %s", i,
                                error);
                        return EINVAL;
@@ -1528,8 +1547,15 @@ sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
        struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev);
        struct sfc_rss *rss = &sfc_sa2shared(sa)->rss;
        unsigned int efx_hash_types;
+       uint32_t contexts[] = {EFX_RSS_CONTEXT_DEFAULT, rss->dummy_rss_context};
+       unsigned int n_contexts;
+       unsigned int mode_i = 0;
+       unsigned int key_i = 0;
+       unsigned int i = 0;
        int rc = 0;
 
+       n_contexts = rss->dummy_rss_context == EFX_RSS_CONTEXT_DEFAULT ? 1 : 2;
+
        if (sfc_sa2shared(sa)->isolated)
                return -ENOTSUP;
 
@@ -1556,19 +1582,24 @@ sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
        if (rc != 0)
                goto fail_rx_hf_rte_to_efx;
 
-       rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
-                                  rss->hash_alg, efx_hash_types, B_TRUE);
-       if (rc != 0)
-               goto fail_scale_mode_set;
+       for (mode_i = 0; mode_i < n_contexts; mode_i++) {
+               rc = efx_rx_scale_mode_set(sa->nic, contexts[mode_i],
+                                          rss->hash_alg, efx_hash_types,
+                                          B_TRUE);
+               if (rc != 0)
+                       goto fail_scale_mode_set;
+       }
 
        if (rss_conf->rss_key != NULL) {
                if (sa->state == SFC_ADAPTER_STARTED) {
-                       rc = efx_rx_scale_key_set(sa->nic,
-                                                 EFX_RSS_CONTEXT_DEFAULT,
-                                                 rss_conf->rss_key,
-                                                 sizeof(rss->key));
-                       if (rc != 0)
-                               goto fail_scale_key_set;
+                       for (key_i = 0; key_i < n_contexts; key_i++) {
+                               rc = efx_rx_scale_key_set(sa->nic,
+                                                         contexts[key_i],
+                                                         rss_conf->rss_key,
+                                                         sizeof(rss->key));
+                               if (rc != 0)
+                                       goto fail_scale_key_set;
+                       }
                }
 
                rte_memcpy(rss->key, rss_conf->rss_key, sizeof(rss->key));
@@ -1581,12 +1612,20 @@ sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
        return 0;
 
 fail_scale_key_set:
-       if (efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
-                                 EFX_RX_HASHALG_TOEPLITZ,
-                                 rss->hash_types, B_TRUE) != 0)
-               sfc_err(sa, "failed to restore RSS mode");
+       for (i = 0; i < key_i; i++) {
+               if (efx_rx_scale_key_set(sa->nic, contexts[i], rss->key,
+                                        sizeof(rss->key)) != 0)
+                       sfc_err(sa, "failed to restore RSS key");
+       }
 
 fail_scale_mode_set:
+       for (i = 0; i < mode_i; i++) {
+               if (efx_rx_scale_mode_set(sa->nic, contexts[i],
+                                         EFX_RX_HASHALG_TOEPLITZ,
+                                         rss->hash_types, B_TRUE) != 0)
+                       sfc_err(sa, "failed to restore RSS mode");
+       }
+
 fail_rx_hf_rte_to_efx:
        sfc_adapter_unlock(sa);
        return -rc;
@@ -1885,6 +1924,11 @@ sfc_eth_dev_set_ops(struct rte_eth_dev *dev)
        case EFX_FAMILY_MEDFORD:
        case EFX_FAMILY_MEDFORD2:
                avail_caps |= SFC_DP_HW_FW_CAP_EF10;
+               avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX;
+               avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX;
+               break;
+       case EFX_FAMILY_RIVERHEAD:
+               avail_caps |= SFC_DP_HW_FW_CAP_EF100;
                break;
        default:
                break;
@@ -2101,27 +2145,18 @@ fail_alloc_priv:
        return rc;
 }
 
-static void
-sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev)
-{
-       free(dev->process_private);
-       dev->process_private = NULL;
-       dev->dev_ops = NULL;
-       dev->tx_pkt_prepare = NULL;
-       dev->tx_pkt_burst = NULL;
-       dev->rx_pkt_burst = NULL;
-}
-
 static void
 sfc_register_dp(void)
 {
        /* Register once */
        if (TAILQ_EMPTY(&sfc_dp_head)) {
                /* Prefer EF10 datapath */
+               sfc_dp_register(&sfc_dp_head, &sfc_ef100_rx.dp);
                sfc_dp_register(&sfc_dp_head, &sfc_ef10_essb_rx.dp);
                sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp);
                sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp);
 
+               sfc_dp_register(&sfc_dp_head, &sfc_ef100_tx.dp);
                sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp);
                sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp);
                sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp);
@@ -2258,11 +2293,6 @@ fail_alloc_sa:
 static int
 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
 {
-       if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
-               sfc_eth_dev_secondary_clear_ops(dev);
-               return 0;
-       }
-
        sfc_dev_close(dev);
 
        return 0;
@@ -2277,6 +2307,7 @@ static const struct rte_pci_id pci_id_sfc_efx_map[] = {
        { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
        { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) },
        { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) },
+       { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) },
        { .vendor_id = 0 /* sentinel */ }
 };